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Avoid redefinition and nnbreak windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55911 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -718,7 +718,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF) {
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BasicBlock::iterator const Begin = LLVMBB->begin();
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BasicBlock::iterator const Begin = LLVMBB->begin();
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BasicBlock::iterator const End = LLVMBB->end();
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BasicBlock::iterator const End = LLVMBB->end();
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BasicBlock::iterator I = Begin;
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BasicBlock::iterator BI = Begin;
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// Lower any arguments needed in this block if this is the entry block.
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// Lower any arguments needed in this block if this is the entry block.
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if (LLVMBB == &Fn.getEntryBlock())
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if (LLVMBB == &Fn.getEntryBlock())
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@ -738,7 +738,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF) {
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}
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}
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F->setCurrentBlock(BB);
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F->setCurrentBlock(BB);
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// Do FastISel on as many instructions as possible.
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// Do FastISel on as many instructions as possible.
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for (; I != End; ++I) {
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for (; BI != End; ++BI) {
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// Just before the terminator instruction, insert instructions to
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// Just before the terminator instruction, insert instructions to
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// feed PHI nodes in successor blocks.
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// feed PHI nodes in successor blocks.
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if (isa<TerminatorInst>(I))
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if (isa<TerminatorInst>(I))
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@ -746,41 +746,41 @@ void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF) {
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if (DisableFastISelAbort)
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if (DisableFastISelAbort)
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break;
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break;
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#ifndef NDEBUG
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#ifndef NDEBUG
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I->dump();
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BI->dump();
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#endif
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#endif
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assert(0 && "FastISel didn't handle a PHI in a successor");
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assert(0 && "FastISel didn't handle a PHI in a successor");
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}
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}
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// First try normal tablegen-generated "fast" selection.
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// First try normal tablegen-generated "fast" selection.
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if (F->SelectInstruction(I))
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if (F->SelectInstruction(BI))
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continue;
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continue;
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// Next, try calling the target to attempt to handle the instruction.
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// Next, try calling the target to attempt to handle the instruction.
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if (F->TargetSelectInstruction(I))
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if (F->TargetSelectInstruction(BI))
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continue;
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continue;
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// Then handle certain instructions as single-LLVM-Instruction blocks.
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// Then handle certain instructions as single-LLVM-Instruction blocks.
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if (isa<CallInst>(I) || isa<LoadInst>(I) ||
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if (isa<CallInst>(BI) || isa<LoadInst>(BI) ||
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isa<StoreInst>(I)) {
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isa<StoreInst>(BI)) {
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if (I->getType() != Type::VoidTy) {
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if (BI->getType() != Type::VoidTy) {
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unsigned &R = FuncInfo->ValueMap[I];
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unsigned &R = FuncInfo->ValueMap[I];
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if (!R)
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if (!R)
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R = FuncInfo->CreateRegForValue(I);
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R = FuncInfo->CreateRegForValue(BI);
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}
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}
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SelectBasicBlock(LLVMBB, I, next(I));
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SelectBasicBlock(LLVMBB, BI, next(BI));
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continue;
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continue;
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}
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}
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if (!DisableFastISelAbort &&
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if (!DisableFastISelAbort &&
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// For now, don't abort on non-conditional-branch terminators.
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// For now, don't abort on non-conditional-branch terminators.
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(!isa<TerminatorInst>(I) ||
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(!isa<TerminatorInst>(BI) ||
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(isa<BranchInst>(I) &&
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(isa<BranchInst>(BI) &&
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cast<BranchInst>(I)->isUnconditional()))) {
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cast<BranchInst>(BI)->isUnconditional()))) {
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// The "fast" selector couldn't handle something and bailed.
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// The "fast" selector couldn't handle something and bailed.
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// For the purpose of debugging, just abort.
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// For the purpose of debugging, just abort.
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#ifndef NDEBUG
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#ifndef NDEBUG
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I->dump();
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BI->dump();
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#endif
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#endif
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assert(0 && "FastISel didn't select the entire block");
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assert(0 && "FastISel didn't select the entire block");
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}
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}
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@ -793,8 +793,8 @@ void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF) {
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// Run SelectionDAG instruction selection on the remainder of the block
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// Run SelectionDAG instruction selection on the remainder of the block
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// not handled by FastISel. If FastISel is not run, this is the entire
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// not handled by FastISel. If FastISel is not run, this is the entire
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// block.
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// block.
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if (I != End)
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if (BI != End)
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SelectBasicBlock(LLVMBB, I, End);
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SelectBasicBlock(LLVMBB, BI, End);
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FinishBasicBlock();
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FinishBasicBlock();
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}
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}
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