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- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53097 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -152,36 +152,44 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
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unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
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unsigned DestReg = MPhi->getOperand(0).getReg();
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bool isDead = MPhi->getOperand(0).isDead();
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// Create a new register for the incoming PHI arguments.
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MachineFunction &MF = *MBB.getParent();
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const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
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unsigned IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
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unsigned IncomingReg = 0;
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// Insert a register to register copy at the top of the current block (but
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// after any remaining phi nodes) which copies the new incoming register
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// into the phi node destination.
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const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
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if (isSourceDefinedByImplicitDef(MPhi, MRI))
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// If all sources of a PHI node are implicit_def, just emit an implicit_def
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// instead of a copy.
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BuildMI(MBB, AfterPHIsIt, TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
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else
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// If all sources of a PHI node are implicit_def, just emit an
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// implicit_def instead of a copy.
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BuildMI(MBB, AfterPHIsIt,
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TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
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else {
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IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
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TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
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}
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// Update live variable information if there is any.
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LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
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if (LV) {
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MachineInstr *PHICopy = prior(AfterPHIsIt);
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// Increment use count of the newly created virtual register.
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LV->getVarInfo(IncomingReg).NumUses++;
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if (IncomingReg) {
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// Increment use count of the newly created virtual register.
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LV->getVarInfo(IncomingReg).NumUses++;
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// Add information to LiveVariables to know that the incoming value is
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// killed. Note that because the value is defined in several places (once
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// each for each incoming block), the "def" block and instruction fields for
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// the VarInfo is not filled in.
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LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
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// Add information to LiveVariables to know that the incoming value is
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// killed. Note that because the value is defined in several places (once
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// each for each incoming block), the "def" block and instruction fields
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// for the VarInfo is not filled in.
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LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
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LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true;
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}
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// Since we are going to be deleting the PHI node, if it is the last use of
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// any registers, or if the value itself is dead, we need to move this
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@@ -189,12 +197,10 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
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LV->removeVirtualRegistersKilled(MPhi);
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// If the result is dead, update LV.
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if (MPhi->registerDefIsDead(DestReg)) {
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if (isDead) {
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LV->addVirtualRegisterDead(DestReg, PHICopy);
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LV->removeVirtualRegistersDead(MPhi);
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LV->removeVirtualRegisterDead(DestReg, MPhi);
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}
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LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true;
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}
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// Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
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@@ -211,7 +217,7 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
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"Machine PHI Operands must all be virtual registers!");
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// If source is defined by an implicit def, there is no need to insert a
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// copy unless it's the only source.
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// copy.
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MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
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if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
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ImpDefs.insert(DefMI);
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