mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-06-24 08:24:33 +00:00
Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214781 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
@ -58,6 +58,7 @@
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetSelectionDAGInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include <algorithm>
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using namespace llvm;
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@ -860,7 +861,7 @@ void SelectionDAGBuilder::init(GCFunctionInfo *gfi, AliasAnalysis &aa,
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AA = &aa;
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GFI = gfi;
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LibInfo = li;
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DL = DAG.getTarget().getDataLayout();
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DL = DAG.getTarget().getSubtargetImpl()->getDataLayout();
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Context = DAG.getContext();
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LPadToCallSiteMap.clear();
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}
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@ -1018,8 +1019,9 @@ SDValue SelectionDAGBuilder::getValue(const Value *V) {
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DenseMap<const Value *, unsigned>::iterator It = FuncInfo.ValueMap.find(V);
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if (It != FuncInfo.ValueMap.end()) {
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unsigned InReg = It->second;
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RegsForValue RFV(*DAG.getContext(), *TM.getTargetLowering(),
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InReg, V->getType());
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RegsForValue RFV(*DAG.getContext(),
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*TM.getSubtargetImpl()->getTargetLowering(), InReg,
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V->getType());
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SDValue Chain = DAG.getEntryNode();
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N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurSDLoc(), Chain, nullptr, V);
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resolveDanglingDebugInfo(V, N);
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@ -1050,7 +1052,7 @@ SDValue SelectionDAGBuilder::getNonRegisterValue(const Value *V) {
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/// getValueImpl - Helper function for getValue and getNonRegisterValue.
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/// Create an SDValue for the given value.
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SDValue SelectionDAGBuilder::getValueImpl(const Value *V) {
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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if (const Constant *C = dyn_cast<Constant>(V)) {
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EVT VT = TLI->getValueType(V->getType(), true);
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@ -1184,7 +1186,7 @@ SDValue SelectionDAGBuilder::getValueImpl(const Value *V) {
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}
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void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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SDValue Chain = getControlRoot();
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SmallVector<ISD::OutputArg, 8> Outs;
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SmallVector<SDValue, 8> OutVals;
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@ -1275,9 +1277,8 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
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bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg();
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CallingConv::ID CallConv =
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DAG.getMachineFunction().getFunction()->getCallingConv();
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Chain = TM.getTargetLowering()->LowerReturn(Chain, CallConv, isVarArg,
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Outs, OutVals, getCurSDLoc(),
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DAG);
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Chain = TM.getSubtargetImpl()->getTargetLowering()->LowerReturn(
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Chain, CallConv, isVarArg, Outs, OutVals, getCurSDLoc(), DAG);
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// Verify that the target's LowerReturn behaved as expected.
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assert(Chain.getNode() && Chain.getValueType() == MVT::Other &&
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@ -1601,10 +1602,9 @@ void SelectionDAGBuilder::visitBr(const BranchInst &I) {
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// jle foo
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//
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if (const BinaryOperator *BOp = dyn_cast<BinaryOperator>(CondVal)) {
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if (!TM.getTargetLowering()->isJumpExpensive() &&
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BOp->hasOneUse() &&
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(BOp->getOpcode() == Instruction::And ||
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BOp->getOpcode() == Instruction::Or)) {
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if (!TM.getSubtargetImpl()->getTargetLowering()->isJumpExpensive() &&
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BOp->hasOneUse() && (BOp->getOpcode() == Instruction::And ||
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BOp->getOpcode() == Instruction::Or)) {
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FindMergedConditions(BOp, Succ0MBB, Succ1MBB, BrMBB, BrMBB,
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BOp->getOpcode(), getEdgeWeight(BrMBB, Succ0MBB),
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getEdgeWeight(BrMBB, Succ1MBB));
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@ -1724,7 +1724,7 @@ void SelectionDAGBuilder::visitSwitchCase(CaseBlock &CB,
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void SelectionDAGBuilder::visitJumpTable(JumpTable &JT) {
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// Emit the code for the jump table
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assert(JT.Reg != -1U && "Should lower JT Header first!");
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EVT PTy = TM.getTargetLowering()->getPointerTy();
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EVT PTy = TM.getSubtargetImpl()->getTargetLowering()->getPointerTy();
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SDValue Index = DAG.getCopyFromReg(getControlRoot(), getCurSDLoc(),
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JT.Reg, PTy);
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SDValue Table = DAG.getJumpTable(JT.JTI, PTy);
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@ -1752,7 +1752,7 @@ void SelectionDAGBuilder::visitJumpTableHeader(JumpTable &JT,
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// can be used as an index into the jump table in a subsequent basic block.
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// This value may be smaller or larger than the target's pointer type, and
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// therefore require extension or truncating.
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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SwitchOp = DAG.getZExtOrTrunc(Sub, getCurSDLoc(), TLI->getPointerTy());
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unsigned JumpTableReg = FuncInfo.CreateReg(TLI->getPointerTy());
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@ -1799,7 +1799,7 @@ void SelectionDAGBuilder::visitSPDescriptorParent(StackProtectorDescriptor &SPD,
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MachineBasicBlock *ParentBB) {
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// First create the loads to the guard/stack slot for the comparison.
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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EVT PtrTy = TLI->getPointerTy();
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MachineFrameInfo *MFI = ParentBB->getParent()->getFrameInfo();
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@ -1863,7 +1863,7 @@ void SelectionDAGBuilder::visitSPDescriptorParent(StackProtectorDescriptor &SPD,
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/// StackProtectorDescriptor.
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void
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SelectionDAGBuilder::visitSPDescriptorFailure(StackProtectorDescriptor &SPD) {
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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SDValue Chain = TLI->makeLibCall(DAG, RTLIB::STACKPROTECTOR_CHECK_FAIL,
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MVT::isVoid, nullptr, 0, false,
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getCurSDLoc(), false, false).second;
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@ -1881,7 +1881,7 @@ void SelectionDAGBuilder::visitBitTestHeader(BitTestBlock &B,
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DAG.getConstant(B.First, VT));
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// Check range
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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SDValue RangeCmp = DAG.getSetCC(getCurSDLoc(),
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TLI->getSetCCResultType(*DAG.getContext(),
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Sub.getValueType()),
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@ -1946,7 +1946,7 @@ void SelectionDAGBuilder::visitBitTestCase(BitTestBlock &BB,
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Reg, VT);
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SDValue Cmp;
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unsigned PopCount = CountPopulation_64(B.Mask);
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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if (PopCount == 1) {
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// Testing for a single bit; just compare the shift count with what it
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// would need to be to shift a 1 bit in that position.
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@ -2044,7 +2044,7 @@ void SelectionDAGBuilder::visitLandingPad(const LandingPadInst &LP) {
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// If there aren't registers to copy the values into (e.g., during SjLj
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// exceptions), then don't bother to create these DAG nodes.
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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if (TLI->getExceptionPointerRegister() == 0 &&
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TLI->getExceptionSelectorRegister() == 0)
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return;
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@ -2255,7 +2255,7 @@ bool SelectionDAGBuilder::handleJTSwitchCase(CaseRec &CR,
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for (CaseItr I = CR.Range.first, E = CR.Range.second; I != E; ++I)
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TSize += I->size();
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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if (!areJTsAllowed(*TLI) || TSize.ult(TLI->getMinimumJumpTableEntries()))
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return false;
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@ -2423,7 +2423,7 @@ bool SelectionDAGBuilder::handleBTSplitSwitchCase(CaseRec& CR,
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RSize -= J->size();
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}
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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if (areJTsAllowed(*TLI)) {
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// If our case is dense we *really* should handle it earlier!
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assert((FMetric > 0) && "Should handle dense range earlier!");
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@ -2494,7 +2494,7 @@ bool SelectionDAGBuilder::handleBitTestsSwitchCase(CaseRec& CR,
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const Value* SV,
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MachineBasicBlock* Default,
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MachineBasicBlock* SwitchBB) {
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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EVT PTy = TLI->getPointerTy();
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unsigned IntPtrBits = PTy.getSizeInBits();
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@ -2816,7 +2816,8 @@ void SelectionDAGBuilder::visitShift(const User &I, unsigned Opcode) {
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SDValue Op1 = getValue(I.getOperand(0));
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SDValue Op2 = getValue(I.getOperand(1));
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EVT ShiftTy = TM.getTargetLowering()->getShiftAmountTy(Op2.getValueType());
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EVT ShiftTy = TM.getSubtargetImpl()->getTargetLowering()->getShiftAmountTy(
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Op2.getValueType());
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// Coerce the shift amount to the right type if we can.
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if (!I.getType()->isVectorTy() && Op2.getValueType() != ShiftTy) {
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@ -2871,8 +2872,8 @@ void SelectionDAGBuilder::visitSDiv(const User &I) {
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if (isa<BinaryOperator>(&I) && cast<BinaryOperator>(&I)->isExact() &&
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!isa<ConstantSDNode>(Op1) &&
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isa<ConstantSDNode>(Op2) && !cast<ConstantSDNode>(Op2)->isNullValue())
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setValue(&I, TM.getTargetLowering()->BuildExactSDIV(Op1, Op2,
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getCurSDLoc(), DAG));
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setValue(&I, TM.getSubtargetImpl()->getTargetLowering()->BuildExactSDIV(
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Op1, Op2, getCurSDLoc(), DAG));
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else
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setValue(&I, DAG.getNode(ISD::SDIV, getCurSDLoc(), Op1.getValueType(),
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Op1, Op2));
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@ -2888,7 +2889,8 @@ void SelectionDAGBuilder::visitICmp(const User &I) {
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SDValue Op2 = getValue(I.getOperand(1));
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ISD::CondCode Opcode = getICmpCondCode(predicate);
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Opcode));
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}
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@ -2903,13 +2905,15 @@ void SelectionDAGBuilder::visitFCmp(const User &I) {
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ISD::CondCode Condition = getFCmpCondCode(predicate);
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if (TM.Options.NoNaNsFPMath)
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Condition = getFCmpCodeWithoutNaN(Condition);
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Condition));
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}
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void SelectionDAGBuilder::visitSelect(const User &I) {
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SmallVector<EVT, 4> ValueVTs;
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ComputeValueVTs(*TM.getTargetLowering(), I.getType(), ValueVTs);
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ComputeValueVTs(*TM.getSubtargetImpl()->getTargetLowering(), I.getType(),
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ValueVTs);
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unsigned NumValues = ValueVTs.size();
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if (NumValues == 0) return;
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@ -2936,7 +2940,8 @@ void SelectionDAGBuilder::visitSelect(const User &I) {
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void SelectionDAGBuilder::visitTrunc(const User &I) {
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// TruncInst cannot be a no-op cast because sizeof(src) > sizeof(dest).
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), DestVT, N));
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}
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@ -2944,7 +2949,8 @@ void SelectionDAGBuilder::visitZExt(const User &I) {
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// ZExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
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// ZExt also can't be a cast to bool for same reason. So, nothing much to do
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(), DestVT, N));
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}
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@ -2952,14 +2958,15 @@ void SelectionDAGBuilder::visitSExt(const User &I) {
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// SExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
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// SExt also can't be a cast to bool for same reason. So, nothing much to do
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurSDLoc(), DestVT, N));
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}
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void SelectionDAGBuilder::visitFPTrunc(const User &I) {
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// FPTrunc is never a no-op cast, no need to check
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SDValue N = getValue(I.getOperand(0));
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const TargetLowering *TLI = TM.getTargetLowering();
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const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
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EVT DestVT = TLI->getValueType(I.getType());
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setValue(&I, DAG.getNode(ISD::FP_ROUND, getCurSDLoc(),
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DestVT, N,
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@ -2969,35 +2976,40 @@ void SelectionDAGBuilder::visitFPTrunc(const User &I) {
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void SelectionDAGBuilder::visitFPExt(const User &I) {
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// FPExt is never a no-op cast, no need to check
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getNode(ISD::FP_EXTEND, getCurSDLoc(), DestVT, N));
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}
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void SelectionDAGBuilder::visitFPToUI(const User &I) {
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// FPToUI is never a no-op cast, no need to check
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getNode(ISD::FP_TO_UINT, getCurSDLoc(), DestVT, N));
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}
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void SelectionDAGBuilder::visitFPToSI(const User &I) {
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// FPToSI is never a no-op cast, no need to check
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getNode(ISD::FP_TO_SINT, getCurSDLoc(), DestVT, N));
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}
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void SelectionDAGBuilder::visitUIToFP(const User &I) {
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// UIToFP is never a no-op cast, no need to check
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getNode(ISD::UINT_TO_FP, getCurSDLoc(), DestVT, N));
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}
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void SelectionDAGBuilder::visitSIToFP(const User &I) {
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// SIToFP is never a no-op cast, no need to check
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getNode(ISD::SINT_TO_FP, getCurSDLoc(), DestVT, N));
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}
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@ -3005,7 +3017,8 @@ void SelectionDAGBuilder::visitPtrToInt(const User &I) {
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// What to do depends on the size of the integer and the size of the pointer.
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// We can either truncate, zero extend, or no-op, accordingly.
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getZExtOrTrunc(N, getCurSDLoc(), DestVT));
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}
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@ -3013,13 +3026,15 @@ void SelectionDAGBuilder::visitIntToPtr(const User &I) {
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// What to do depends on the size of the integer and the size of the pointer.
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// We can either truncate, zero extend, or no-op, accordingly.
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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setValue(&I, DAG.getZExtOrTrunc(N, getCurSDLoc(), DestVT));
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}
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void SelectionDAGBuilder::visitBitCast(const User &I) {
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SDValue N = getValue(I.getOperand(0));
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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// BitCast assures us that source and destination are the same size so this is
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// either a BITCAST or a no-op.
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@ -3041,7 +3056,8 @@ void SelectionDAGBuilder::visitAddrSpaceCast(const User &I) {
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const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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const Value *SV = I.getOperand(0);
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SDValue N = getValue(SV);
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EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
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EVT DestVT =
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
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unsigned SrcAS = SV->getType()->getPointerAddressSpace();
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unsigned DestAS = I.getType()->getPointerAddressSpace();
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@ -3058,9 +3074,11 @@ void SelectionDAGBuilder::visitInsertElement(const User &I) {
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SDValue InVal = getValue(I.getOperand(1));
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SDValue InIdx = DAG.getSExtOrTrunc(getValue(I.getOperand(2)),
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getCurSDLoc(), TLI.getVectorIdxTy());
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setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurSDLoc(),
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TM.getTargetLowering()->getValueType(I.getType()),
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InVec, InVal, InIdx));
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setValue(&I,
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DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurSDLoc(),
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TM.getSubtargetImpl()->getTargetLowering()->getValueType(
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I.getType()),
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InVec, InVal, InIdx));
|
||||
}
|
||||
|
||||
void SelectionDAGBuilder::visitExtractElement(const User &I) {
|
||||
@ -3068,9 +3086,11 @@ void SelectionDAGBuilder::visitExtractElement(const User &I) {
|
||||
SDValue InVec = getValue(I.getOperand(0));
|
||||
SDValue InIdx = DAG.getSExtOrTrunc(getValue(I.getOperand(1)),
|
||||
getCurSDLoc(), TLI.getVectorIdxTy());
|
||||
setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurSDLoc(),
|
||||
TM.getTargetLowering()->getValueType(I.getType()),
|
||||
InVec, InIdx));
|
||||
setValue(&I,
|
||||
DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurSDLoc(),
|
||||
TM.getSubtargetImpl()->getTargetLowering()->getValueType(
|
||||
I.getType()),
|
||||
InVec, InIdx));
|
||||
}
|
||||
|
||||
// Utility for visitShuffleVector - Return true if every element in Mask,
|
||||
@ -3092,7 +3112,7 @@ void SelectionDAGBuilder::visitShuffleVector(const User &I) {
|
||||
ShuffleVectorInst::getShuffleMask(cast<Constant>(I.getOperand(2)), Mask);
|
||||
unsigned MaskNumElts = Mask.size();
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
EVT VT = TLI->getValueType(I.getType());
|
||||
EVT SrcVT = Src1.getValueType();
|
||||
unsigned SrcNumElts = SrcVT.getVectorNumElements();
|
||||
@ -3272,7 +3292,7 @@ void SelectionDAGBuilder::visitInsertValue(const InsertValueInst &I) {
|
||||
|
||||
unsigned LinearIndex = ComputeLinearIndex(AggTy, I.getIndices());
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
SmallVector<EVT, 4> AggValueVTs;
|
||||
ComputeValueVTs(*TLI, AggTy, AggValueVTs);
|
||||
SmallVector<EVT, 4> ValValueVTs;
|
||||
@ -3312,7 +3332,7 @@ void SelectionDAGBuilder::visitExtractValue(const ExtractValueInst &I) {
|
||||
|
||||
unsigned LinearIndex = ComputeLinearIndex(AggTy, I.getIndices());
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
SmallVector<EVT, 4> ValValueVTs;
|
||||
ComputeValueVTs(*TLI, ValTy, ValValueVTs);
|
||||
|
||||
@ -3363,7 +3383,7 @@ void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
|
||||
Ty = cast<SequentialType>(Ty)->getElementType();
|
||||
|
||||
// If this is a constant subscript, handle it quickly.
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
if (const ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
|
||||
if (CI->isZero()) continue;
|
||||
uint64_t Offs =
|
||||
@ -3421,7 +3441,7 @@ void SelectionDAGBuilder::visitAlloca(const AllocaInst &I) {
|
||||
return; // getValue will auto-populate this.
|
||||
|
||||
Type *Ty = I.getAllocatedType();
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
uint64_t TySize = TLI->getDataLayout()->getTypeAllocSize(Ty);
|
||||
unsigned Align =
|
||||
std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty),
|
||||
@ -3440,7 +3460,8 @@ void SelectionDAGBuilder::visitAlloca(const AllocaInst &I) {
|
||||
// Handle alignment. If the requested alignment is less than or equal to
|
||||
// the stack alignment, ignore it. If the size is greater than or equal to
|
||||
// the stack alignment, we note this in the DYNAMIC_STACKALLOC node.
|
||||
unsigned StackAlign = TM.getFrameLowering()->getStackAlignment();
|
||||
unsigned StackAlign =
|
||||
TM.getSubtargetImpl()->getFrameLowering()->getStackAlignment();
|
||||
if (Align <= StackAlign)
|
||||
Align = 0;
|
||||
|
||||
@ -3484,7 +3505,8 @@ void SelectionDAGBuilder::visitLoad(const LoadInst &I) {
|
||||
|
||||
SmallVector<EVT, 4> ValueVTs;
|
||||
SmallVector<uint64_t, 4> Offsets;
|
||||
ComputeValueVTs(*TM.getTargetLowering(), Ty, ValueVTs, &Offsets);
|
||||
ComputeValueVTs(*TM.getSubtargetImpl()->getTargetLowering(), Ty, ValueVTs,
|
||||
&Offsets);
|
||||
unsigned NumValues = ValueVTs.size();
|
||||
if (NumValues == 0)
|
||||
return;
|
||||
@ -3504,7 +3526,7 @@ void SelectionDAGBuilder::visitLoad(const LoadInst &I) {
|
||||
Root = DAG.getRoot();
|
||||
}
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
if (isVolatile)
|
||||
Root = TLI->prepareVolatileOrAtomicLoad(Root, getCurSDLoc(), DAG);
|
||||
|
||||
@ -3561,7 +3583,8 @@ void SelectionDAGBuilder::visitStore(const StoreInst &I) {
|
||||
|
||||
SmallVector<EVT, 4> ValueVTs;
|
||||
SmallVector<uint64_t, 4> Offsets;
|
||||
ComputeValueVTs(*TM.getTargetLowering(), SrcV->getType(), ValueVTs, &Offsets);
|
||||
ComputeValueVTs(*TM.getSubtargetImpl()->getTargetLowering(), SrcV->getType(),
|
||||
ValueVTs, &Offsets);
|
||||
unsigned NumValues = ValueVTs.size();
|
||||
if (NumValues == 0)
|
||||
return;
|
||||
@ -3638,7 +3661,7 @@ void SelectionDAGBuilder::visitAtomicCmpXchg(const AtomicCmpXchgInst &I) {
|
||||
|
||||
SDValue InChain = getRoot();
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
if (TLI->getInsertFencesForAtomic())
|
||||
InChain = InsertFenceForAtomic(InChain, SuccessOrder, Scope, true, dl,
|
||||
DAG, *TLI);
|
||||
@ -3685,7 +3708,7 @@ void SelectionDAGBuilder::visitAtomicRMW(const AtomicRMWInst &I) {
|
||||
|
||||
SDValue InChain = getRoot();
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
if (TLI->getInsertFencesForAtomic())
|
||||
InChain = InsertFenceForAtomic(InChain, Order, Scope, true, dl,
|
||||
DAG, *TLI);
|
||||
@ -3712,7 +3735,7 @@ void SelectionDAGBuilder::visitAtomicRMW(const AtomicRMWInst &I) {
|
||||
|
||||
void SelectionDAGBuilder::visitFence(const FenceInst &I) {
|
||||
SDLoc dl = getCurSDLoc();
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
SDValue Ops[3];
|
||||
Ops[0] = getRoot();
|
||||
Ops[1] = DAG.getConstant(I.getOrdering(), TLI->getPointerTy());
|
||||
@ -3727,7 +3750,7 @@ void SelectionDAGBuilder::visitAtomicLoad(const LoadInst &I) {
|
||||
|
||||
SDValue InChain = getRoot();
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
EVT VT = TLI->getValueType(I.getType());
|
||||
|
||||
if (I.getAlignment() < VT.getSizeInBits() / 8)
|
||||
@ -3767,7 +3790,7 @@ void SelectionDAGBuilder::visitAtomicStore(const StoreInst &I) {
|
||||
|
||||
SDValue InChain = getRoot();
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
EVT VT = TLI->getValueType(I.getValueOperand()->getType());
|
||||
|
||||
if (I.getAlignment() < VT.getSizeInBits() / 8)
|
||||
@ -3813,7 +3836,7 @@ void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I,
|
||||
|
||||
// Info is set by getTgtMemInstrinsic
|
||||
TargetLowering::IntrinsicInfo Info;
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
bool IsTgtIntrinsic = TLI->getTgtMemIntrinsic(Info, I, Intrinsic);
|
||||
|
||||
// Add the intrinsic ID as an integer operand if it's not a target intrinsic.
|
||||
@ -4578,7 +4601,8 @@ SelectionDAGBuilder::EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable,
|
||||
return false;
|
||||
|
||||
MachineFunction &MF = DAG.getMachineFunction();
|
||||
const TargetInstrInfo *TII = DAG.getTarget().getInstrInfo();
|
||||
const TargetInstrInfo *TII =
|
||||
DAG.getTarget().getSubtargetImpl()->getInstrInfo();
|
||||
|
||||
// Ignore inlined function arguments here.
|
||||
DIVariable DV(Variable);
|
||||
@ -4649,7 +4673,7 @@ SelectionDAGBuilder::EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable,
|
||||
/// otherwise lower it and return null.
|
||||
const char *
|
||||
SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
SDLoc sdl = getCurSDLoc();
|
||||
DebugLoc dl = getCurDebugLoc();
|
||||
SDValue Res;
|
||||
@ -4673,7 +4697,8 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
|
||||
case Intrinsic::read_register: {
|
||||
Value *Reg = I.getArgOperand(0);
|
||||
SDValue RegName = DAG.getMDNode(cast<MDNode>(Reg));
|
||||
EVT VT = TM.getTargetLowering()->getValueType(I.getType());
|
||||
EVT VT =
|
||||
TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType());
|
||||
setValue(&I, DAG.getNode(ISD::READ_REGISTER, sdl, VT, RegName));
|
||||
return nullptr;
|
||||
}
|
||||
@ -5485,7 +5510,7 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
|
||||
void SelectionDAGBuilder::LowerCallTo(ImmutableCallSite CS, SDValue Callee,
|
||||
bool isTailCall,
|
||||
MachineBasicBlock *LandingPad) {
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
PointerType *PT = cast<PointerType>(CS.getCalledValue()->getType());
|
||||
FunctionType *FTy = cast<FunctionType>(PT->getElementType());
|
||||
Type *RetTy = FTy->getReturnType();
|
||||
@ -5637,7 +5662,8 @@ static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT,
|
||||
void SelectionDAGBuilder::processIntegerCallValue(const Instruction &I,
|
||||
SDValue Value,
|
||||
bool IsSigned) {
|
||||
EVT VT = TM.getTargetLowering()->getValueType(I.getType(), true);
|
||||
EVT VT = TM.getSubtargetImpl()->getTargetLowering()->getValueType(I.getType(),
|
||||
true);
|
||||
if (IsSigned)
|
||||
Value = DAG.getSExtOrTrunc(Value, getCurSDLoc(), VT);
|
||||
else
|
||||
@ -5662,7 +5688,8 @@ bool SelectionDAGBuilder::visitMemCmpCall(const CallInst &I) {
|
||||
const Value *Size = I.getArgOperand(2);
|
||||
const ConstantInt *CSize = dyn_cast<ConstantInt>(Size);
|
||||
if (CSize && CSize->getZExtValue() == 0) {
|
||||
EVT CallVT = TM.getTargetLowering()->getValueType(I.getType(), true);
|
||||
EVT CallVT = TM.getSubtargetImpl()->getTargetLowering()->getValueType(
|
||||
I.getType(), true);
|
||||
setValue(&I, DAG.getConstant(0, CallVT));
|
||||
return true;
|
||||
}
|
||||
@ -5719,7 +5746,7 @@ bool SelectionDAGBuilder::visitMemCmpCall(const CallInst &I) {
|
||||
// Require that we can find a legal MVT, and only do this if the target
|
||||
// supports unaligned loads of that type. Expanding into byte loads would
|
||||
// bloat the code.
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
if (ActuallyDoIt && CSize->getZExtValue() > 4) {
|
||||
unsigned DstAS = LHS->getType()->getPointerAddressSpace();
|
||||
unsigned SrcAS = RHS->getType()->getPointerAddressSpace();
|
||||
@ -6067,8 +6094,8 @@ void SelectionDAGBuilder::visitCall(const CallInst &I) {
|
||||
if (!RenameFn)
|
||||
Callee = getValue(I.getCalledValue());
|
||||
else
|
||||
Callee = DAG.getExternalSymbol(RenameFn,
|
||||
TM.getTargetLowering()->getPointerTy());
|
||||
Callee = DAG.getExternalSymbol(
|
||||
RenameFn, TM.getSubtargetImpl()->getTargetLowering()->getPointerTy());
|
||||
|
||||
// Check if we can potentially perform a tail call. More detailed checking is
|
||||
// be done within LowerCallTo, after more information about the call is known.
|
||||
@ -6263,7 +6290,7 @@ void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
|
||||
/// ConstraintOperands - Information about all of the constraints.
|
||||
SDISelAsmOperandInfoVector ConstraintOperands;
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
TargetLowering::AsmOperandInfoVector
|
||||
TargetConstraints = TLI->ParseConstraints(CS);
|
||||
|
||||
@ -6786,7 +6813,7 @@ void SelectionDAGBuilder::visitVAStart(const CallInst &I) {
|
||||
}
|
||||
|
||||
void SelectionDAGBuilder::visitVAArg(const VAArgInst &I) {
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
const DataLayout &DL = *TLI->getDataLayout();
|
||||
SDValue V = DAG.getVAArg(TLI->getValueType(I.getType()), getCurSDLoc(),
|
||||
getRoot(), getValue(I.getOperand(0)),
|
||||
@ -6848,7 +6875,7 @@ SelectionDAGBuilder::LowerCallOperands(const CallInst &CI, unsigned ArgIdx,
|
||||
.setCallee(CI.getCallingConv(), retTy, Callee, std::move(Args), NumArgs)
|
||||
.setDiscardResult(!CI.use_empty());
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
return TLI->LowerCallTo(CLI);
|
||||
}
|
||||
|
||||
@ -7392,7 +7419,7 @@ SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V, unsigned Reg) {
|
||||
"Copy from a reg to the same reg!");
|
||||
assert(!TargetRegisterInfo::isPhysicalRegister(Reg) && "Is a physreg");
|
||||
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
RegsForValue RFV(V->getContext(), *TLI, Reg, V->getType());
|
||||
SDValue Chain = DAG.getEntryNode();
|
||||
RFV.getCopyToRegs(Op, DAG, getCurSDLoc(), Chain, nullptr, V);
|
||||
@ -7719,7 +7746,7 @@ SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
|
||||
// Remember that this register needs to added to the machine PHI node as
|
||||
// the input for this MBB.
|
||||
SmallVector<EVT, 4> ValueVTs;
|
||||
const TargetLowering *TLI = TM.getTargetLowering();
|
||||
const TargetLowering *TLI = TM.getSubtargetImpl()->getTargetLowering();
|
||||
ComputeValueVTs(*TLI, PN->getType(), ValueVTs);
|
||||
for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
|
||||
EVT VT = ValueVTs[vti];
|
||||
|
||||
Reference in New Issue
Block a user