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https://github.com/c64scene-ar/llvm-6502.git
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Set ARM if-conversion block size threshold to 10 instructions for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37194 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -124,6 +124,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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addRegisterClass(MVT::f32, ARM::SPRRegisterClass);
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addRegisterClass(MVT::f64, ARM::DPRRegisterClass);
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}
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computeRegisterProperties();
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// ARM does not have f32 extending load.
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setLoadXAction(ISD::EXTLOAD, MVT::f32, Expand);
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@ -252,9 +253,8 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
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setStackPointerRegisterToSaveRestore(ARM::SP);
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setSchedulingPreference(SchedulingForRegPressure);
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computeRegisterProperties();
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setIfCvtBlockSizeLimit(Subtarget->isThumb() ? 0 : 10);
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maxStoresPerMemcpy = 1; //// temporary - rewrite interface to use type
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}
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