[C++11] Add 'override' keyword to virtual methods that override their base class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203220 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2014-03-07 09:26:03 +00:00
parent 177c1ef30d
commit 9f998de891
83 changed files with 346 additions and 347 deletions

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@@ -172,20 +172,20 @@ namespace llvm {
/// getAnalysisUsage - Record analysis usage.
///
void getAnalysisUsage(AnalysisUsage &AU) const;
void getAnalysisUsage(AnalysisUsage &AU) const override;
/// doInitialization - Set up the AsmPrinter when we are working on a new
/// module. If your pass overrides this, it must make sure to explicitly
/// call this implementation.
bool doInitialization(Module &M);
bool doInitialization(Module &M) override;
/// doFinalization - Shut down the asmprinter. If you override this in your
/// pass, you must make sure to call it explicitly.
bool doFinalization(Module &M);
bool doFinalization(Module &M) override;
/// runOnMachineFunction - Emit the specified function out to the
/// OutStreamer.
virtual bool runOnMachineFunction(MachineFunction &MF) {
bool runOnMachineFunction(MachineFunction &MF) override {
SetupMachineFunction(MF);
EmitFunctionHeader();
EmitFunctionBody();

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@@ -55,8 +55,8 @@ public:
void view() const;
private:
virtual bool runOnMachineFunction(MachineFunction&);
virtual void getAnalysisUsage(AnalysisUsage&) const;
bool runOnMachineFunction(MachineFunction&) override;
void getAnalysisUsage(AnalysisUsage&) const override;
};
/// Specialize WriteGraph, the standard implementation won't work.

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@@ -51,7 +51,7 @@ class Function;
/// occurred, more memory is allocated, and we reemit the code into it.
///
class JITCodeEmitter : public MachineCodeEmitter {
virtual void anchor();
void anchor() override;
public:
virtual ~JITCodeEmitter() {}
@@ -59,15 +59,15 @@ public:
/// about to be code generated. This initializes the BufferBegin/End/Ptr
/// fields.
///
virtual void startFunction(MachineFunction &F) = 0;
void startFunction(MachineFunction &F) override = 0;
/// finishFunction - This callback is invoked when the specified function has
/// finished code generation. If a buffer overflow has occurred, this method
/// returns true (the callee is required to try again), otherwise it returns
/// false.
///
virtual bool finishFunction(MachineFunction &F) = 0;
bool finishFunction(MachineFunction &F) override = 0;
/// allocIndirectGV - Allocates and fills storage for an indirect
/// GlobalValue, and returns the address.
virtual void *allocIndirectGV(const GlobalValue *GV,
@@ -248,12 +248,12 @@ public:
/// emitLabel - Emits a label
virtual void emitLabel(MCSymbol *Label) = 0;
void emitLabel(MCSymbol *Label) override = 0;
/// allocateSpace - Allocate a block of space in the current output buffer,
/// returning null (and setting conditions to indicate buffer overflow) on
/// failure. Alignment is the alignment in bytes of the buffer desired.
virtual void *allocateSpace(uintptr_t Size, unsigned Alignment) {
void *allocateSpace(uintptr_t Size, unsigned Alignment) override {
emitAlignment(Alignment);
void *Result;
@@ -278,18 +278,18 @@ public:
/// StartMachineBasicBlock - This should be called by the target when a new
/// basic block is about to be emitted. This way the MCE knows where the
/// start of the block is, and can implement getMachineBasicBlockAddress.
virtual void StartMachineBasicBlock(MachineBasicBlock *MBB) = 0;
void StartMachineBasicBlock(MachineBasicBlock *MBB) override = 0;
/// getCurrentPCValue - This returns the address that the next emitted byte
/// will be output to.
///
virtual uintptr_t getCurrentPCValue() const {
uintptr_t getCurrentPCValue() const override {
return (uintptr_t)CurBufferPtr;
}
/// getCurrentPCOffset - Return the offset from the start of the emitted
/// buffer that we are currently writing to.
uintptr_t getCurrentPCOffset() const {
uintptr_t getCurrentPCOffset() const override {
return CurBufferPtr-BufferBegin;
}
@@ -298,38 +298,39 @@ public:
/// creates jump tables or constant pools in memory on the fly while the
/// object code emitters rely on a linker to have real addresses and should
/// use relocations instead.
bool earlyResolveAddresses() const { return true; }
bool earlyResolveAddresses() const override { return true; }
/// addRelocation - Whenever a relocatable address is needed, it should be
/// noted with this interface.
virtual void addRelocation(const MachineRelocation &MR) = 0;
void addRelocation(const MachineRelocation &MR) override = 0;
/// FIXME: These should all be handled with relocations!
/// getConstantPoolEntryAddress - Return the address of the 'Index' entry in
/// the constant pool that was last emitted with the emitConstantPool method.
///
virtual uintptr_t getConstantPoolEntryAddress(unsigned Index) const = 0;
uintptr_t getConstantPoolEntryAddress(unsigned Index) const override = 0;
/// getJumpTableEntryAddress - Return the address of the jump table with index
/// 'Index' in the function that last called initJumpTableInfo.
///
virtual uintptr_t getJumpTableEntryAddress(unsigned Index) const = 0;
uintptr_t getJumpTableEntryAddress(unsigned Index) const override = 0;
/// getMachineBasicBlockAddress - Return the address of the specified
/// MachineBasicBlock, only usable after the label for the MBB has been
/// emitted.
///
virtual uintptr_t getMachineBasicBlockAddress(MachineBasicBlock *MBB) const= 0;
uintptr_t
getMachineBasicBlockAddress(MachineBasicBlock *MBB) const override = 0;
/// getLabelAddress - Return the address of the specified Label, only usable
/// after the Label has been emitted.
///
virtual uintptr_t getLabelAddress(MCSymbol *Label) const = 0;
uintptr_t getLabelAddress(MCSymbol *Label) const override = 0;
/// Specifies the MachineModuleInfo object. This is used for exception handling
/// purposes.
virtual void setModuleInfo(MachineModuleInfo* Info) = 0;
void setModuleInfo(MachineModuleInfo* Info) override = 0;
/// getLabelLocations - Return the label locations map of the label IDs to
/// their address.

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@@ -47,21 +47,21 @@ namespace llvm {
LatencyPriorityQueue() : Picker(this) {
}
bool isBottomUp() const { return false; }
bool isBottomUp() const override { return false; }
void initNodes(std::vector<SUnit> &sunits) {
void initNodes(std::vector<SUnit> &sunits) override {
SUnits = &sunits;
NumNodesSolelyBlocking.resize(SUnits->size(), 0);
}
void addNode(const SUnit *SU) {
void addNode(const SUnit *SU) override {
NumNodesSolelyBlocking.resize(SUnits->size(), 0);
}
void updateNode(const SUnit *SU) {
void updateNode(const SUnit *SU) override {
}
void releaseState() {
void releaseState() override {
SUnits = 0;
}
@@ -75,21 +75,21 @@ namespace llvm {
return NumNodesSolelyBlocking[NodeNum];
}
bool empty() const { return Queue.empty(); }
bool empty() const override { return Queue.empty(); }
virtual void push(SUnit *U);
void push(SUnit *U) override;
virtual SUnit *pop();
SUnit *pop() override;
virtual void remove(SUnit *SU);
void remove(SUnit *SU) override;
virtual void dump(ScheduleDAG* DAG) const;
void dump(ScheduleDAG* DAG) const override;
// scheduledNode - As nodes are scheduled, we look to see if there are any
// successor nodes that have a single unscheduled predecessor. If so, that
// single predecessor has a higher priority, since scheduling it will make
// the node available.
void scheduledNode(SUnit *Node);
void scheduledNode(SUnit *Node) override;
private:
void AdjustPriorityOfUnscheduledPreds(SUnit *SU);

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@@ -255,14 +255,14 @@ namespace llvm {
VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
virtual void releaseMemory();
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
/// runOnMachineFunction - pass entry point
virtual bool runOnMachineFunction(MachineFunction&);
bool runOnMachineFunction(MachineFunction&) override;
/// print - Implement the dump method.
virtual void print(raw_ostream &O, const Module* = 0) const;
void print(raw_ostream &O, const Module* = 0) const override;
/// intervalIsInOneMBB - If LI is confined to a single basic block, return
/// a pointer to that block. If LI is live in to or out of any block,

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@@ -99,7 +99,7 @@ private:
/// MachineRegisterInfo callback to notify when new virtual
/// registers are created.
void MRI_NoteNewVirtualRegister(unsigned VReg);
void MRI_NoteNewVirtualRegister(unsigned VReg) override;
public:
/// Create a LiveRangeEdit for breaking down parent into smaller pieces.

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@@ -59,9 +59,9 @@ class LiveRegMatrix : public MachineFunctionPass {
BitVector RegMaskUsable;
// MachineFunctionPass boilerplate.
virtual void getAnalysisUsage(AnalysisUsage&) const;
virtual bool runOnMachineFunction(MachineFunction&);
virtual void releaseMemory();
void getAnalysisUsage(AnalysisUsage&) const override;
bool runOnMachineFunction(MachineFunction&) override;
void releaseMemory() override;
public:
static char ID;
LiveRegMatrix();

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@@ -85,14 +85,14 @@ namespace llvm {
VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
virtual void releaseMemory();
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
/// runOnMachineFunction - pass entry point
virtual bool runOnMachineFunction(MachineFunction&);
bool runOnMachineFunction(MachineFunction&) override;
/// print - Implement the dump method.
virtual void print(raw_ostream &O, const Module* = 0) const;
void print(raw_ostream &O, const Module* = 0) const override;
};
}

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@@ -177,7 +177,7 @@ private: // Intermediate data structures
void analyzePHINodes(const MachineFunction& Fn);
public:
virtual bool runOnMachineFunction(MachineFunction &MF);
bool runOnMachineFunction(MachineFunction &MF) override;
/// RegisterDefIsDead - Return true if the specified instruction defines the
/// specified register, but that definition is dead.
@@ -258,10 +258,10 @@ public:
(void)Removed;
return true;
}
void getAnalysisUsage(AnalysisUsage &AU) const;
virtual void releaseMemory() {
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override {
VirtRegInfo.clear();
}

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@@ -39,9 +39,9 @@ public:
~MachineBlockFrequencyInfo();
void getAnalysisUsage(AnalysisUsage &AU) const;
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &F);
bool runOnMachineFunction(MachineFunction &F) override;
/// getblockFreq - Return block frequency. Return 0 if we don't have the
/// information. Please note that initial frequency is equal to 1024. It means

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@@ -40,7 +40,7 @@ public:
initializeMachineBranchProbabilityInfoPass(Registry);
}
void getAnalysisUsage(AnalysisUsage &AU) const {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
}

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@@ -48,7 +48,7 @@ public:
DominatorTreeBase<MachineBasicBlock>& getBase() { return *DT; }
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
void getAnalysisUsage(AnalysisUsage &AU) const override;
/// getRoots - Return the root blocks of the current CFG. This may include
/// multiple blocks if we are computing post dominators. For forward
@@ -66,7 +66,7 @@ public:
return DT->getRootNode();
}
virtual bool runOnMachineFunction(MachineFunction &F);
bool runOnMachineFunction(MachineFunction &F) override;
inline bool dominates(const MachineDomTreeNode* A,
const MachineDomTreeNode* B) const {
@@ -166,9 +166,9 @@ public:
return DT->isReachableFromEntry(A);
}
virtual void releaseMemory();
void releaseMemory() override;
virtual void print(raw_ostream &OS, const Module*) const;
void print(raw_ostream &OS, const Module*) const override;
};
//===-------------------------------------

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@@ -34,16 +34,16 @@ public:
~MachineFunctionAnalysis();
MachineFunction &getMF() const { return *MF; }
virtual const char* getPassName() const {
const char* getPassName() const override {
return "Machine Function Analysis";
}
private:
virtual bool doInitialization(Module &M);
virtual bool runOnFunction(Function &F);
virtual void releaseMemory();
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
bool doInitialization(Module &M) override;
bool runOnFunction(Function &F) override;
void releaseMemory() override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
} // End llvm namespace

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@@ -44,14 +44,14 @@ protected:
/// For MachineFunctionPasses, calling AU.preservesCFG() indicates that
/// the pass does not modify the MachineBasicBlock CFG.
///
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
void getAnalysisUsage(AnalysisUsage &AU) const override;
private:
/// createPrinterPass - Get a machine function printer pass.
virtual Pass *createPrinterPass(raw_ostream &O,
const std::string &Banner) const;
Pass *createPrinterPass(raw_ostream &O,
const std::string &Banner) const override;
virtual bool runOnFunction(Function &F);
bool runOnFunction(Function &F) override;
};
} // End llvm namespace

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@@ -120,11 +120,11 @@ public:
/// runOnFunction - Calculate the natural loop information.
///
virtual bool runOnMachineFunction(MachineFunction &F);
bool runOnMachineFunction(MachineFunction &F) override;
virtual void releaseMemory() { LI.releaseMemory(); }
void releaseMemory() override { LI.releaseMemory(); }
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
void getAnalysisUsage(AnalysisUsage &AU) const override;
/// removeLoop - This removes the specified top-level loop from this loop info
/// object. The loop is not deleted, as it will presumably be inserted into

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@@ -180,8 +180,8 @@ public:
~MachineModuleInfo();
// Initialization and Finalization
virtual bool doInitialization(Module &);
virtual bool doFinalization(Module &);
bool doInitialization(Module &) override;
bool doFinalization(Module &) override;
/// EndFunction - Discard function meta information.
///

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@@ -142,12 +142,10 @@ public:
// Implement the MachinePassRegistryListener callbacks.
//
virtual void NotifyAdd(const char *N,
MachinePassCtor C,
const char *D) {
void NotifyAdd(const char *N, MachinePassCtor C, const char *D) override {
this->addLiteralOption(N, (typename RegistryClass::FunctionPassCtor)C, D);
}
virtual void NotifyRemove(const char *N) {
void NotifyRemove(const char *N) override {
this->removeLiteralOption(N);
}
};

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@@ -77,9 +77,9 @@ public:
return DT->findNearestCommonDominator(A, B);
}
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
virtual void print(llvm::raw_ostream &OS, const Module *M = 0) const;
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void print(llvm::raw_ostream &OS, const Module *M = 0) const override;
};
} //end of namespace llvm

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@@ -294,7 +294,7 @@ public:
/// Implement ScheduleDAGInstrs interface for scheduling a sequence of
/// reorderable instructions.
virtual void schedule();
void schedule() override;
/// Change the position of an instruction within the basic block and update
/// live ranges and region boundary iterators.
@@ -384,7 +384,7 @@ public:
virtual ~ScheduleDAGMILive();
/// Return true if this DAG supports VReg liveness and RegPressure.
virtual bool hasVRegLiveness() const { return true; }
bool hasVRegLiveness() const override { return true; }
/// \brief Return true if register pressure tracking is enabled.
bool isTrackingPressure() const { return ShouldTrackPressure; }
@@ -427,7 +427,7 @@ public:
/// Implement ScheduleDAGInstrs interface for scheduling a sequence of
/// reorderable instructions.
virtual void schedule();
void schedule() override;
/// Compute the cyclic critical path through the DAG.
unsigned computeCyclicCriticalPath();

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@@ -77,10 +77,10 @@ public:
class Trace;
static char ID;
MachineTraceMetrics();
void getAnalysisUsage(AnalysisUsage&) const;
bool runOnMachineFunction(MachineFunction&);
void releaseMemory();
void verifyAnalysis() const;
void getAnalysisUsage(AnalysisUsage&) const override;
bool runOnMachineFunction(MachineFunction&) override;
void releaseMemory() override;
void verifyAnalysis() const override;
friend class Ensemble;
friend class Trace;

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@@ -29,7 +29,7 @@ namespace llvm {
/// printCustom - Implement printing for PseudoSourceValue. This is called
/// from Value::print or Value's operator<<.
///
virtual void printCustom(raw_ostream &O) const;
void printCustom(raw_ostream &O) const override;
public:
explicit PseudoSourceValue(enum ValueTy Subclass = PseudoSourceValueVal);
@@ -93,13 +93,13 @@ namespace llvm {
return V->getValueID() == FixedStackPseudoSourceValueVal;
}
virtual bool isConstant(const MachineFrameInfo *MFI) const;
bool isConstant(const MachineFrameInfo *MFI) const override;
virtual bool isAliased(const MachineFrameInfo *MFI) const;
bool isAliased(const MachineFrameInfo *MFI) const override;
virtual bool mayAlias(const MachineFrameInfo *) const;
bool mayAlias(const MachineFrameInfo *) const override;
virtual void printCustom(raw_ostream &OS) const;
void printCustom(raw_ostream &OS) const override;
int getFrameIndex() const { return FI; }
};

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@@ -142,9 +142,9 @@ namespace llvm {
/// Build a PBQP instance to represent the register allocation problem for
/// the given MachineFunction.
virtual PBQPRAProblem *build(MachineFunction *mf, const LiveIntervals *lis,
const MachineBlockFrequencyInfo *mbfi,
const RegSet &vregs);
PBQPRAProblem *build(MachineFunction *mf, const LiveIntervals *lis,
const MachineBlockFrequencyInfo *mbfi,
const RegSet &vregs) override;
private:

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@@ -229,13 +229,13 @@ namespace llvm {
/// the level of the whole MachineFunction. By default does nothing.
virtual void finalizeSchedule() {}
virtual void dumpNode(const SUnit *SU) const;
void dumpNode(const SUnit *SU) const override;
/// Return a label for a DAG node that points to an instruction.
virtual std::string getGraphNodeLabel(const SUnit *SU) const;
std::string getGraphNodeLabel(const SUnit *SU) const override;
/// Return a label for the region of code covered by the DAG.
virtual std::string getDAGName() const;
std::string getDAGName() const override;
/// \brief Fix register kill flags that scheduling has made invalid.
void fixupKills(MachineBasicBlock *MBB);

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@@ -110,15 +110,15 @@ public:
/// atIssueLimit - Return true if no more instructions may be issued in this
/// cycle.
virtual bool atIssueLimit() const;
bool atIssueLimit() const override;
// Stalls provides an cycle offset at which SU will be scheduled. It will be
// negative for bottom-up scheduling.
virtual HazardType getHazardType(SUnit *SU, int Stalls);
virtual void Reset();
virtual void EmitInstruction(SUnit *SU);
virtual void AdvanceCycle();
virtual void RecedeCycle();
HazardType getHazardType(SUnit *SU, int Stalls) override;
void Reset() override;
void EmitInstruction(SUnit *SU) override;
void AdvanceCycle() override;
void RecedeCycle() override;
};
}

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@@ -377,10 +377,10 @@ namespace llvm {
initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
}
virtual void getAnalysisUsage(AnalysisUsage &au) const;
virtual void releaseMemory();
void getAnalysisUsage(AnalysisUsage &au) const override;
void releaseMemory() override;
virtual bool runOnMachineFunction(MachineFunction &fn);
bool runOnMachineFunction(MachineFunction &fn) override;
/// Dump the indexes.
void dump() const;

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@@ -43,10 +43,10 @@ public:
/// \brief Tell the pass manager which passes we depend on and what
/// information we preserve.
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
void getAnalysisUsage(AnalysisUsage &AU) const override;
/// \brief Calculate the liveness information for the given machine function.
virtual bool runOnMachineFunction(MachineFunction &MF);
bool runOnMachineFunction(MachineFunction &MF) override;
private:
/// \brief Performs the actual liveness calculation for the function.

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@@ -114,14 +114,14 @@ public:
initializeStackProtectorPass(*PassRegistry::getPassRegistry());
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addPreserved<DominatorTreeWrapperPass>();
}
SSPLayoutKind getSSPLayout(const AllocaInst *AI) const;
void adjustForColoring(const AllocaInst *From, const AllocaInst *To);
virtual bool runOnFunction(Function &Fn);
bool runOnFunction(Function &Fn) override;
};
} // end namespace llvm

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@@ -70,9 +70,9 @@ namespace llvm {
static char ID;
VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { }
virtual bool runOnMachineFunction(MachineFunction &MF);
bool runOnMachineFunction(MachineFunction &MF) override;
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -177,7 +177,7 @@ namespace llvm {
/// the specified stack slot
void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
void print(raw_ostream &OS, const Module* M = 0) const;
void print(raw_ostream &OS, const Module* M = 0) const override;
void dump() const;
};