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[AArch64] Add support for NEON scalar floating-point absolute difference.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195803 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2013-11-27 01:45:58 +00:00
parent df13080481
commit 9fef0370c5
6 changed files with 67 additions and 0 deletions
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3
include/llvm/IR/IntrinsicsAArch64.td
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@ -312,6 +312,9 @@ def int_aarch64_neon_vsqadd : Neon_2Arg_Intrinsic;
def int_aarch64_neon_vabs :
Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
// Scalar Absolute Difference
def int_aarch64_neon_vabd : Neon_2Arg_Intrinsic;
// Scalar Negate Value
def int_aarch64_neon_vneg :
Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;

5
lib/Target/AArch64/AArch64InstrNEON.td
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@ -5074,6 +5074,11 @@ defm FACGT: NeonI_Scalar3Same_SD_sizes<0b1, 0b1, 0b11101, "facgt">;
defm : Neon_Scalar3Same_cmp_SD_size_patterns<int_aarch64_neon_vcagt,
FACGTsss, FACGTddd>;
// Scakar Floating-point Absolute Difference
defm FABD: NeonI_Scalar3Same_SD_sizes<0b1, 0b1, 0b11010, "fabd">;
defm : Neon_Scalar3Same_SD_size_patterns<int_aarch64_neon_vabd,
FABDsss, FABDddd>;
// Scalar Absolute Value
defm ABS : NeonI_Scalar2SameMisc_D_size<0b0, 0b01011, "abs">;
defm : Neon_Scalar2SameMisc_D_size_patterns<int_aarch64_neon_vabs, ABSdd>;

26
test/CodeGen/AArch64/neon-scalar-fabd.ll Normal file
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@ -0,0 +1,26 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
define float @test_vabds_f32(float %a, float %b) {
; CHECK-LABEL: test_vabds_f32
; CHECK: fabd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
entry:
%vabd.i = insertelement <1 x float> undef, float %a, i32 0
%vabd1.i = insertelement <1 x float> undef, float %b, i32 0
%vabd2.i = call <1 x float> @llvm.aarch64.neon.vabd.v1f32(<1 x float> %vabd.i, <1 x float> %vabd1.i)
%0 = extractelement <1 x float> %vabd2.i, i32 0
ret float %0
}
define double @test_vabdd_f64(double %a, double %b) {
; CHECK-LABEL: test_vabdd_f64
; CHECK: fabd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
entry:
%vabd.i = insertelement <1 x double> undef, double %a, i32 0
%vabd1.i = insertelement <1 x double> undef, double %b, i32 0
%vabd2.i = call <1 x double> @llvm.aarch64.neon.vabd.v1f64(<1 x double> %vabd.i, <1 x double> %vabd1.i)
%0 = extractelement <1 x double> %vabd2.i, i32 0
ret double %0
}
declare <1 x double> @llvm.aarch64.neon.vabd.v1f64(<1 x double>, <1 x double>)
declare <1 x float> @llvm.aarch64.neon.vabd.v1f32(<1 x float>, <1 x float>)

15
test/MC/AArch64/neon-diagnostics.s
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@ -7301,3 +7301,18 @@
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: fcvtzu d0, s0
// CHECK-ERROR: ^
//----------------------------------------------------------------------
// Scalar Floating-point Absolute Difference
//----------------------------------------------------------------------
fabd s29, d24, s20
fabd d29, s24, d20
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: fabd s29, d24, s20
// CHECK-ERROR: ^
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: fabd d29, s24, d20
// CHECK-ERROR: ^

10
test/MC/AArch64/neon-scalar-abs.s
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@ -9,6 +9,16 @@
abs d29, d24
// CHECK: abs d29, d24 // encoding: [0x1d,0xbb,0xe0,0x5e]
//----------------------------------------------------------------------
// Scalar Floating-point Absolute Difference
//----------------------------------------------------------------------
fabd s29, s24, s20
fabd d29, d24, d20
// CHECK: fabd s29, s24, s20 // encoding: [0x1d,0xd7,0xb4,0x7e]
// CHECK: fabd d29, d24, d20 // encoding: [0x1d,0xd7,0xf4,0x7e]
//----------------------------------------------------------------------
// Scalar Signed Saturating Absolute Value

8
test/MC/Disassembler/AArch64/neon-instructions.txt
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@ -2609,3 +2609,11 @@
# CHECK: fcvtzu d21, d14
0xac,0xb9,0xa1,0x7e
0xd5,0xb9,0xe1,0x7e
#----------------------------------------------------------------------
# Scalar Floating-point Absolute Difference
#----------------------------------------------------------------------
# CHECK: fabd s29, s24, s20
# CHECK: fabd d29, d24, d20
0x1d,0xd7,0xb4,0x7e
0x1d,0xd7,0xf4,0x7e