mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-17 21:29:20 +00:00
rename these nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26848 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
b2827b0901
commit
a064d28843
@ -179,10 +179,10 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM)
|
||||
setOperationAction(ISD::LOAD , MVT::v4f32, Legal);
|
||||
setOperationAction(ISD::ADD , MVT::v4i32, Legal);
|
||||
setOperationAction(ISD::LOAD , MVT::v4i32, Legal);
|
||||
// FIXME: We don't support any ConstantVec's yet. We should custom expand
|
||||
// FIXME: We don't support any BUILD_VECTOR's yet. We should custom expand
|
||||
// the ones we do!
|
||||
setOperationAction(ISD::ConstantVec, MVT::v4f32, Expand);
|
||||
setOperationAction(ISD::ConstantVec, MVT::v4i32, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v4i32, Expand);
|
||||
}
|
||||
|
||||
setSetCCResultContents(ZeroOrOneSetCCResult);
|
||||
|
@ -263,9 +263,9 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
|
||||
addRegisterClass(MVT::v2i32, X86::VR64RegisterClass);
|
||||
|
||||
// FIXME: add MMX packed arithmetics
|
||||
setOperationAction(ISD::ConstantVec, MVT::v8i8, Expand);
|
||||
setOperationAction(ISD::ConstantVec, MVT::v4i16, Expand);
|
||||
setOperationAction(ISD::ConstantVec, MVT::v2i32, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Expand);
|
||||
}
|
||||
|
||||
if (TM.getSubtarget<X86Subtarget>().hasSSE1()) {
|
||||
@ -275,7 +275,7 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
|
||||
setOperationAction(ISD::SUB , MVT::v4f32, Legal);
|
||||
setOperationAction(ISD::MUL , MVT::v4f32, Legal);
|
||||
setOperationAction(ISD::LOAD , MVT::v4f32, Legal);
|
||||
setOperationAction(ISD::ConstantVec, MVT::v4f32, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Expand);
|
||||
}
|
||||
|
||||
if (TM.getSubtarget<X86Subtarget>().hasSSE2()) {
|
||||
@ -290,11 +290,11 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
|
||||
setOperationAction(ISD::SUB , MVT::v2f64, Legal);
|
||||
setOperationAction(ISD::MUL , MVT::v2f64, Legal);
|
||||
setOperationAction(ISD::LOAD , MVT::v2f64, Legal);
|
||||
setOperationAction(ISD::ConstantVec, MVT::v2f64, Expand);
|
||||
setOperationAction(ISD::ConstantVec, MVT::v16i8, Expand);
|
||||
setOperationAction(ISD::ConstantVec, MVT::v8i16, Expand);
|
||||
setOperationAction(ISD::ConstantVec, MVT::v4i32, Expand);
|
||||
setOperationAction(ISD::ConstantVec, MVT::v2i64, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v2f64, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v16i8, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v8i16, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v4i32, Expand);
|
||||
setOperationAction(ISD::BUILD_VECTOR, MVT::v2i64, Expand);
|
||||
}
|
||||
|
||||
computeRegisterProperties();
|
||||
|
Loading…
Reference in New Issue
Block a user