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CodeGen: Push the ModuleSlotTracker through MachineOperands

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Push `ModuleSlotTracker` through `MachineOperand`s, dropping the time
for `llc -print-machineinstrs` on the testcase in PR23865 from ~13
seconds to ~9 seconds.  Now `SlotTracker::processFunctionMetadata()`
accounts for only 8% of the runtime, which seems reasonable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240845 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan P. N. Exon Smith
2015-06-26 22:06:47 +00:00
parent 982139fde2
commit a08efbfc8e
6 changed files with 63 additions and 37 deletions
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2
include/llvm/CodeGen/MachineInstr.h
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@ -1105,6 +1105,8 @@ public:
// Debugging support
//
void print(raw_ostream &OS, bool SkipOpers = false) const;
void print(raw_ostream &OS, ModuleSlotTracker &MST,
bool SkipOpers = false) const;
void dump() const;
//===--------------------------------------------------------------------===//

12
include/llvm/CodeGen/MachineMemOperand.h
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@ -27,6 +27,7 @@ namespace llvm {
class FoldingSetNodeID;
class MDNode;
class raw_ostream;
class ModuleSlotTracker;
/// MachinePointerInfo - This class contains a discriminated union of
/// information about pointers in memory operands, relating them back to LLVM IR
@ -200,6 +201,12 @@ public:
///
void Profile(FoldingSetNodeID &ID) const;
/// Support for operator<<.
/// @{
void print(raw_ostream &OS) const;
void print(raw_ostream &OS, ModuleSlotTracker &MST) const;
/// @}
friend bool operator==(const MachineMemOperand &LHS,
const MachineMemOperand &RHS) {
return LHS.getValue() == RHS.getValue() &&
@ -219,7 +226,10 @@ public:
}
};
raw_ostream &operator<<(raw_ostream &OS, const MachineMemOperand &MRO);
inline raw_ostream &operator<<(raw_ostream &OS, const MachineMemOperand &MRO) {
MRO.print(OS);
return OS;
}
} // End llvm namespace

3
include/llvm/CodeGen/MachineOperand.h
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@ -27,6 +27,7 @@ class MachineBasicBlock;
class MachineInstr;
class MachineRegisterInfo;
class MDNode;
class ModuleSlotTracker;
class TargetMachine;
class TargetRegisterInfo;
class hash_code;
@ -218,6 +219,8 @@ public:
void clearParent() { ParentMI = nullptr; }
void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr) const;
void print(raw_ostream &os, ModuleSlotTracker &MST,
const TargetRegisterInfo *TRI = nullptr) const;
//===--------------------------------------------------------------------===//
// Accessors that tell you what kind of MachineOperand you're looking at.

3
include/llvm/CodeGen/PseudoSourceValue.h
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@ -29,8 +29,7 @@ namespace llvm {
/// space), or constant pool.
class PseudoSourceValue {
private:
friend raw_ostream &llvm::operator<<(raw_ostream &OS,
const MachineMemOperand &MMO);
friend class MachineMemOperand; // For printCustom().
/// printCustom - Implement printing for PseudoSourceValue. This is called
/// from Value::print or Value's operator<<.

2
lib/CodeGen/MachineBasicBlock.cpp
View File

@ -305,7 +305,7 @@ void MachineBasicBlock::print(raw_ostream &OS, ModuleSlotTracker &MST,
OS << '\t';
if (I->isInsideBundle())
OS << " * ";
I->print(OS);
I->print(OS, MST);
}
// Print the successors of this block according to the CFG.

78
lib/CodeGen/MachineInstr.cpp
View File

@ -28,6 +28,7 @@
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/ModuleSlotTracker.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
#include "llvm/MC/MCInstrDesc.h"
@ -296,10 +297,14 @@ hash_code llvm::hash_value(const MachineOperand &MO) {
llvm_unreachable("Invalid machine operand type");
}
/// print - Print the specified machine operand.
///
void MachineOperand::print(raw_ostream &OS,
const TargetRegisterInfo *TRI) const {
ModuleSlotTracker DummyMST(nullptr);
print(OS, DummyMST, TRI);
}
void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
const TargetRegisterInfo *TRI) const {
switch (getType()) {
case MachineOperand::MO_Register:
OS << PrintReg(getReg(), TRI, getSubReg());
@ -387,7 +392,7 @@ void MachineOperand::print(raw_ostream &OS,
break;
case MachineOperand::MO_GlobalAddress:
OS << "<ga:";
getGlobal()->printAsOperand(OS, /*PrintType=*/false);
getGlobal()->printAsOperand(OS, /*PrintType=*/false, MST);
if (getOffset()) OS << "+" << getOffset();
OS << '>';
break;
@ -398,7 +403,7 @@ void MachineOperand::print(raw_ostream &OS,
break;
case MachineOperand::MO_BlockAddress:
OS << '<';
getBlockAddress()->printAsOperand(OS, /*PrintType=*/false);
getBlockAddress()->printAsOperand(OS, /*PrintType=*/false, MST);
if (getOffset()) OS << "+" << getOffset();
OS << '>';
break;
@ -505,49 +510,52 @@ uint64_t MachineMemOperand::getAlignment() const {
return MinAlign(getBaseAlignment(), getOffset());
}
raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineMemOperand &MMO) {
assert((MMO.isLoad() || MMO.isStore()) &&
void MachineMemOperand::print(raw_ostream &OS) const {
ModuleSlotTracker DummyMST(nullptr);
print(OS, DummyMST);
}
void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST) const {
assert((isLoad() || isStore()) &&
"SV has to be a load, store or both.");
if (MMO.isVolatile())
if (isVolatile())
OS << "Volatile ";
if (MMO.isLoad())
if (isLoad())
OS << "LD";
if (MMO.isStore())
if (isStore())
OS << "ST";
OS << MMO.getSize();
OS << getSize();
// Print the address information.
OS << "[";
if (const Value *V = MMO.getValue())
V->printAsOperand(OS, /*PrintType=*/false);
else if (const PseudoSourceValue *PSV = MMO.getPseudoValue())
if (const Value *V = getValue())
V->printAsOperand(OS, /*PrintType=*/false, MST);
else if (const PseudoSourceValue *PSV = getPseudoValue())
PSV->printCustom(OS);
else
OS << "<unknown>";
unsigned AS = MMO.getAddrSpace();
unsigned AS = getAddrSpace();
if (AS != 0)
OS << "(addrspace=" << AS << ')';
// If the alignment of the memory reference itself differs from the alignment
// of the base pointer, print the base alignment explicitly, next to the base
// pointer.
if (MMO.getBaseAlignment() != MMO.getAlignment())
OS << "(align=" << MMO.getBaseAlignment() << ")";
if (getBaseAlignment() != getAlignment())
OS << "(align=" << getBaseAlignment() << ")";
if (MMO.getOffset() != 0)
OS << "+" << MMO.getOffset();
if (getOffset() != 0)
OS << "+" << getOffset();
OS << "]";
// Print the alignment of the reference.
if (MMO.getBaseAlignment() != MMO.getAlignment() ||
MMO.getBaseAlignment() != MMO.getSize())
OS << "(align=" << MMO.getAlignment() << ")";
if (getBaseAlignment() != getAlignment() || getBaseAlignment() != getSize())
OS << "(align=" << getAlignment() << ")";
// Print TBAA info.
if (const MDNode *TBAAInfo = MMO.getAAInfo().TBAA) {
if (const MDNode *TBAAInfo = getAAInfo().TBAA) {
OS << "(tbaa=";
if (TBAAInfo->getNumOperands() > 0)
TBAAInfo->getOperand(0)->printAsOperand(OS);
@ -557,7 +565,7 @@ raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineMemOperand &MMO) {
}
// Print AA scope info.
if (const MDNode *ScopeInfo = MMO.getAAInfo().Scope) {
if (const MDNode *ScopeInfo = getAAInfo().Scope) {
OS << "(alias.scope=";
if (ScopeInfo->getNumOperands() > 0)
for (unsigned i = 0, ie = ScopeInfo->getNumOperands(); i != ie; ++i) {
@ -571,7 +579,7 @@ raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineMemOperand &MMO) {
}
// Print AA noalias scope info.
if (const MDNode *NoAliasInfo = MMO.getAAInfo().NoAlias) {
if (const MDNode *NoAliasInfo = getAAInfo().NoAlias) {
OS << "(noalias=";
if (NoAliasInfo->getNumOperands() > 0)
for (unsigned i = 0, ie = NoAliasInfo->getNumOperands(); i != ie; ++i) {
@ -585,13 +593,11 @@ raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineMemOperand &MMO) {
}
// Print nontemporal info.
if (MMO.isNonTemporal())
if (isNonTemporal())
OS << "(nontemporal)";
if (MMO.isInvariant())
if (isInvariant())
OS << "(invariant)";
return OS;
}
//===----------------------------------------------------------------------===//
@ -1526,6 +1532,12 @@ void MachineInstr::dump() const {
}
void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
ModuleSlotTracker DummyMST(nullptr);
print(OS, DummyMST, SkipOpers);
}
void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
bool SkipOpers) const {
// We can be a bit tidier if we know the MachineFunction.
const MachineFunction *MF = nullptr;
const TargetRegisterInfo *TRI = nullptr;
@ -1550,7 +1562,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
!getOperand(StartOp).isImplicit();
++StartOp) {
if (StartOp != 0) OS << ", ";
getOperand(StartOp).print(OS, TRI);
getOperand(StartOp).print(OS, MST, TRI);
unsigned Reg = getOperand(StartOp).getReg();
if (TargetRegisterInfo::isVirtualRegister(Reg))
VirtRegs.push_back(Reg);
@ -1577,7 +1589,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
if (isInlineAsm() && e >= InlineAsm::MIOp_FirstOperand) {
// Print asm string.
OS << " ";
getOperand(InlineAsm::MIOp_AsmString).print(OS, TRI);
getOperand(InlineAsm::MIOp_AsmString).print(OS, MST, TRI);
// Print HasSideEffects, MayLoad, MayStore, IsAlignStack
unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
@ -1645,7 +1657,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
if (DIV && !DIV->getName().empty())
OS << "!\"" << DIV->getName() << '\"';
else
MO.print(OS, TRI);
MO.print(OS, MST, TRI);
} else if (TRI && (isInsertSubreg() || isRegSequence()) && MO.isImm()) {
OS << TRI->getSubRegIndexName(MO.getImm());
} else if (i == AsmDescOp && MO.isImm()) {
@ -1679,7 +1691,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
// Compute the index of the next operand descriptor.
AsmDescOp += 1 + InlineAsm::getNumOperandRegisters(Flag);
} else
MO.print(OS, TRI);
MO.print(OS, MST, TRI);
}
// Briefly indicate whether any call clobbers were omitted.
@ -1704,7 +1716,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
OS << " mem:";
for (mmo_iterator i = memoperands_begin(), e = memoperands_end();
i != e; ++i) {
OS << **i;
(*i)->print(OS, MST);
if (std::next(i) != e)
OS << " ";
}