Bugfix: SCEVExpander incorrectly marks increment operations as no-wrap

(The change was landed in r230280 and caused the regression PR22674.
This version contains a fix and a test-case for PR22674).
    
When emitting the increment operation, SCEVExpander marks the
operation as nuw or nsw based on the flags on the preincrement SCEV.
This is incorrect because, for instance, it is possible that {-6,+,1}
is <nuw> while {-6,+,1}+1 = {-5,+,1} is not.
    
This change teaches SCEV to mark the increment as nuw/nsw only if it
can explicitly prove that the increment operation won't overflow.
    
Apart from the attached test case, another (more realistic)
manifestation of the bug can be seen in
Transforms/IndVarSimplify/pr20680.ll.

Differential Revision: http://reviews.llvm.org/D7778



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230533 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjoy Das 2015-02-25 20:02:59 +00:00
parent a40d4ae478
commit a0a0b40aa3
10 changed files with 173 additions and 10 deletions

View File

@ -1063,6 +1063,34 @@ static bool canBeCheaplyTransformed(ScalarEvolution &SE,
return false;
}
static bool IsIncrementNSW(ScalarEvolution &SE, const SCEVAddRecExpr *AR) {
if (!isa<IntegerType>(AR->getType()))
return false;
unsigned BitWidth = cast<IntegerType>(AR->getType())->getBitWidth();
Type *WideTy = IntegerType::get(AR->getType()->getContext(), BitWidth * 2);
const SCEV *Step = AR->getStepRecurrence(SE);
const SCEV *OpAfterExtend = SE.getAddExpr(SE.getSignExtendExpr(Step, WideTy),
SE.getSignExtendExpr(AR, WideTy));
const SCEV *ExtendAfterOp =
SE.getSignExtendExpr(SE.getAddExpr(AR, Step), WideTy);
return ExtendAfterOp == OpAfterExtend;
}
static bool IsIncrementNUW(ScalarEvolution &SE, const SCEVAddRecExpr *AR) {
if (!isa<IntegerType>(AR->getType()))
return false;
unsigned BitWidth = cast<IntegerType>(AR->getType())->getBitWidth();
Type *WideTy = IntegerType::get(AR->getType()->getContext(), BitWidth * 2);
const SCEV *Step = AR->getStepRecurrence(SE);
const SCEV *OpAfterExtend = SE.getAddExpr(SE.getZeroExtendExpr(Step, WideTy),
SE.getZeroExtendExpr(AR, WideTy));
const SCEV *ExtendAfterOp =
SE.getZeroExtendExpr(SE.getAddExpr(AR, Step), WideTy);
return ExtendAfterOp == OpAfterExtend;
}
/// getAddRecExprPHILiterally - Helper for expandAddRecExprLiterally. Expand
/// the base addrec, which is the addrec without any non-loop-dominating
/// values, and return the PHI.
@ -1154,6 +1182,9 @@ SCEVExpander::getAddRecExprPHILiterally(const SCEVAddRecExpr *Normalized,
}
}
bool IncrementIsNUW = IsIncrementNUW(SE, Normalized);
bool IncrementIsNSW = IsIncrementNSW(SE, Normalized);
// Save the original insertion point so we can restore it when we're done.
BuilderType::InsertPointGuard Guard(Builder);
@ -1213,10 +1244,11 @@ SCEVExpander::getAddRecExprPHILiterally(const SCEVAddRecExpr *Normalized,
IVIncInsertPos : Pred->getTerminator();
Builder.SetInsertPoint(InsertPos);
Value *IncV = expandIVInc(PN, StepV, L, ExpandTy, IntTy, useSubtract);
if (isa<OverflowingBinaryOperator>(IncV)) {
if (Normalized->getNoWrapFlags(SCEV::FlagNUW))
if (IncrementIsNUW)
cast<BinaryOperator>(IncV)->setHasNoUnsignedWrap();
if (Normalized->getNoWrapFlags(SCEV::FlagNSW))
if (IncrementIsNSW)
cast<BinaryOperator>(IncV)->setHasNoSignedWrap();
}
PN->addIncoming(IncV, Pred);

View File

@ -0,0 +1,101 @@
; RUN: opt -loop-reduce -S %s
target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnux32"
%"class.llvm::AttributeSetNode.230.2029.3828.6141.6912.7683.8454.9482.9996.10253.18506" = type { %"class.llvm::FoldingSetImpl::Node.1.1801.3600.5913.6684.7455.8226.9254.9768.10025.18505", i32 }
%"class.llvm::FoldingSetImpl::Node.1.1801.3600.5913.6684.7455.8226.9254.9768.10025.18505" = type { i8* }
%"struct.std::pair.241.2040.3839.6152.6923.7694.8465.9493.10007.10264.18507" = type { i32, %"class.llvm::AttributeSetNode.230.2029.3828.6141.6912.7683.8454.9482.9996.10253.18506"* }
%"class.llvm::Attribute.222.2021.3820.6133.6904.7675.8446.9474.9988.10245.18509" = type { %"class.llvm::AttributeImpl.2.1802.3601.5914.6685.7456.8227.9255.9769.10026.18508"* }
%"class.llvm::AttributeImpl.2.1802.3601.5914.6685.7456.8227.9255.9769.10026.18508" = type <{ i32 (...)**, %"class.llvm::FoldingSetImpl::Node.1.1801.3600.5913.6684.7455.8226.9254.9768.10025.18505", i8, [3 x i8] }>
; Function Attrs: nounwind uwtable
define void @_ZNK4llvm11AttrBuilder13hasAttributesENS_12AttributeSetEy() #0 align 2 {
entry:
br i1 undef, label %cond.false, label %_ZNK4llvm12AttributeSet11getNumSlotsEv.exit
_ZNK4llvm12AttributeSet11getNumSlotsEv.exit: ; preds = %entry
br i1 undef, label %cond.false, label %for.body.lr.ph.for.body.lr.ph.split_crit_edge
for.body.lr.ph.for.body.lr.ph.split_crit_edge: ; preds = %_ZNK4llvm12AttributeSet11getNumSlotsEv.exit
br label %land.lhs.true.i
land.lhs.true.i: ; preds = %for.inc, %for.body.lr.ph.for.body.lr.ph.split_crit_edge
%I.099 = phi i32 [ 0, %for.body.lr.ph.for.body.lr.ph.split_crit_edge ], [ %inc, %for.inc ]
%cmp.i = icmp ugt i32 undef, %I.099
br i1 %cmp.i, label %_ZNK4llvm12AttributeSet12getSlotIndexEj.exit, label %cond.false.i.split
cond.false.i.split: ; preds = %land.lhs.true.i
unreachable
_ZNK4llvm12AttributeSet12getSlotIndexEj.exit: ; preds = %land.lhs.true.i
br i1 undef, label %for.end, label %for.inc
for.inc: ; preds = %_ZNK4llvm12AttributeSet12getSlotIndexEj.exit
%inc = add i32 %I.099, 1
br i1 undef, label %cond.false, label %land.lhs.true.i
for.end: ; preds = %_ZNK4llvm12AttributeSet12getSlotIndexEj.exit
%I.099.lcssa129 = phi i32 [ %I.099, %_ZNK4llvm12AttributeSet12getSlotIndexEj.exit ]
br i1 undef, label %cond.false, label %_ZNK4llvm12AttributeSet3endEj.exit
cond.false: ; preds = %for.end, %for.inc, %_ZNK4llvm12AttributeSet11getNumSlotsEv.exit, %entry
unreachable
_ZNK4llvm12AttributeSet3endEj.exit: ; preds = %for.end
%second.i.i.i = getelementptr inbounds %"struct.std::pair.241.2040.3839.6152.6923.7694.8465.9493.10007.10264.18507"* undef, i32 %I.099.lcssa129, i32 1
%0 = load %"class.llvm::AttributeSetNode.230.2029.3828.6141.6912.7683.8454.9482.9996.10253.18506"** %second.i.i.i, align 4, !tbaa !2
%NumAttrs.i.i.i = getelementptr inbounds %"class.llvm::AttributeSetNode.230.2029.3828.6141.6912.7683.8454.9482.9996.10253.18506"* %0, i32 0, i32 1
%1 = load i32* %NumAttrs.i.i.i, align 4, !tbaa !8
%add.ptr.i.i.i55 = getelementptr inbounds %"class.llvm::Attribute.222.2021.3820.6133.6904.7675.8446.9474.9988.10245.18509"* undef, i32 %1
br i1 undef, label %return, label %for.body11
for.cond9: ; preds = %_ZNK4llvm9Attribute13getKindAsEnumEv.exit
%cmp10 = icmp eq %"class.llvm::Attribute.222.2021.3820.6133.6904.7675.8446.9474.9988.10245.18509"* %incdec.ptr, %add.ptr.i.i.i55
br i1 %cmp10, label %return, label %for.body11
for.body11: ; preds = %for.cond9, %_ZNK4llvm12AttributeSet3endEj.exit
%I5.096 = phi %"class.llvm::Attribute.222.2021.3820.6133.6904.7675.8446.9474.9988.10245.18509"* [ %incdec.ptr, %for.cond9 ], [ undef, %_ZNK4llvm12AttributeSet3endEj.exit ]
%2 = bitcast %"class.llvm::Attribute.222.2021.3820.6133.6904.7675.8446.9474.9988.10245.18509"* %I5.096 to i32*
%3 = load i32* %2, align 4, !tbaa !10
%tobool.i59 = icmp eq i32 %3, 0
br i1 %tobool.i59, label %cond.false21, label %_ZNK4llvm9Attribute15isEnumAttributeEv.exit
_ZNK4llvm9Attribute15isEnumAttributeEv.exit: ; preds = %for.body11
switch i8 undef, label %cond.false21 [
i8 0, label %_ZNK4llvm9Attribute13getKindAsEnumEv.exit
i8 1, label %_ZNK4llvm9Attribute13getKindAsEnumEv.exit
i8 2, label %_ZNK4llvm9Attribute15getKindAsStringEv.exit
]
_ZNK4llvm9Attribute13getKindAsEnumEv.exit: ; preds = %_ZNK4llvm9Attribute15isEnumAttributeEv.exit, %_ZNK4llvm9Attribute15isEnumAttributeEv.exit
%incdec.ptr = getelementptr inbounds %"class.llvm::Attribute.222.2021.3820.6133.6904.7675.8446.9474.9988.10245.18509"* %I5.096, i32 1
br i1 undef, label %for.cond9, label %return
cond.false21: ; preds = %_ZNK4llvm9Attribute15isEnumAttributeEv.exit, %for.body11
unreachable
_ZNK4llvm9Attribute15getKindAsStringEv.exit: ; preds = %_ZNK4llvm9Attribute15isEnumAttributeEv.exit
unreachable
return: ; preds = %_ZNK4llvm9Attribute13getKindAsEnumEv.exit, %for.cond9, %_ZNK4llvm12AttributeSet3endEj.exit
ret void
}
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.module.flags = !{!0}
!llvm.ident = !{!1}
!0 = !{i32 1, !"PIC Level", i32 2}
!1 = !{!"clang version 3.7.0 (ssh://llvm@gnu-4.sc.intel.com/export/server/git/llvm/clang 4c31740d4f81614b6d278c7825cfdae5a1c78799) (llvm/llvm.git b693958bd09144aed90312709a7e2ccf7124eb53)"}
!2 = !{!3, !7, i64 4}
!3 = !{!"_ZTSSt4pairIjPN4llvm16AttributeSetNodeEE", !4, i64 0, !7, i64 4}
!4 = !{!"int", !5, i64 0}
!5 = !{!"omnipotent char", !6, i64 0}
!6 = !{!"Simple C/C++ TBAA"}
!7 = !{!"any pointer", !5, i64 0}
!8 = !{!9, !4, i64 4}
!9 = !{!"_ZTSN4llvm16AttributeSetNodeE", !4, i64 4}
!10 = !{!7, !7, i64 0}

View File

@ -0,0 +1,30 @@
; RUN: opt -indvars -S < %s | FileCheck %s
declare void @use(i32)
declare void @use.i8(i8)
define void @f() {
; CHECK-LABEL: @f
entry:
br label %loop
loop:
; The only use for idx.mirror is to induce an nuw for %idx. It does
; not induce an nuw for %idx.inc
%idx.mirror = phi i8 [ -6, %entry ], [ %idx.mirror.inc, %loop ]
%idx = phi i8 [ -5, %entry ], [ %idx.inc, %loop ]
%idx.sext = sext i8 %idx to i32
call void @use(i32 %idx.sext)
%idx.mirror.inc = add nuw i8 %idx.mirror, 1
call void @use.i8(i8 %idx.mirror.inc)
%idx.inc = add i8 %idx, 1
; CHECK-NOT: %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
%cmp = icmp ugt i8 %idx.inc, 0
br i1 %cmp, label %loop, label %exit
exit:
ret void
}

View File

@ -43,7 +43,7 @@ if.end: ; preds = %if.end, %for.cond1.
%shl = and i32 %conv7, 510
store i32 %shl, i32* @c, align 4
; CHECK: %lsr.iv.next = add i32 %lsr.iv, -258
; CHECK: %lsr.iv.next = add nsw i32 %lsr.iv, -258
%dec = add i8 %2, -1
%cmp2 = icmp sgt i8 %dec, -1

View File

@ -20,7 +20,7 @@ for.body: ; preds = %for.body, %entry
%arrayidx = getelementptr inbounds double* %b, i64 %tmp
%tmp1 = load double* %arrayidx, align 8
; The induction variable should carry the scaling factor: 1 * 8 = 8.
; CHECK: [[IVNEXT]] = add nuw i64 [[IV]], 8
; CHECK: [[IVNEXT]] = add nuw nsw i64 [[IV]], 8
%indvars.iv.next = add i64 %indvars.iv, 1
%arrayidx2 = getelementptr inbounds double* %c, i64 %indvars.iv.next
%tmp2 = load double* %arrayidx2, align 8

View File

@ -22,7 +22,7 @@ for.body: ; preds = %for.body, %entry
%arrayidx = getelementptr inbounds double* %b, i64 %tmp
%tmp1 = load double* %arrayidx, align 8
; The induction variable should carry the scaling factor: 1.
; CHECK: [[IVNEXT]] = add nuw i64 [[IV]], 1
; CHECK: [[IVNEXT]] = add nuw nsw i64 [[IV]], 1
%indvars.iv.next = add i64 %indvars.iv, 1
%arrayidx2 = getelementptr inbounds double* %c, i64 %indvars.iv.next
%tmp2 = load double* %arrayidx2, align 8

View File

@ -9,7 +9,7 @@ target triple = "x86_64-apple-macosx"
; CHECK: @llvm.sadd.with.overflow
; CHECK-LABEL: loop2:
; CHECK-NOT: extractvalue
; CHECK: add nuw nsw
; CHECK: add nuw
; CHECK: @llvm.sadd.with.overflow
; CHECK-LABEL: loop3:
; CHECK-NOT: extractvalue

View File

@ -204,8 +204,8 @@ for.cond2.for.inc13_crit_edge: ; preds = %for.cond2.for.inc13
br label %for.inc13
; CHECK: [[for_inc13]]:
; CHECK-NEXT: %[[indvars_iv_next]] = add nuw nsw i32 %[[indvars_iv]], 1
; CHECK-NEXT: %[[exitcond4:.*]] = icmp ne i32 %[[indvars_iv]], -1
; CHECK-NEXT: %[[indvars_iv_next]] = add nsw i32 %[[indvars_iv]], 1
; CHECK-NEXT: %[[exitcond4:.*]] = icmp ne i32 %[[indvars_iv_next]], 0
; CHECK-NEXT: br i1 %[[exitcond4]], label %[[for_cond2_preheader]], label %[[for_end15:.*]]
for.inc13: ; preds = %for.cond2.for.inc13_crit_edge, %for.cond2.preheader
%inc14 = add i8 %storemerge15, 1

View File

@ -19,7 +19,7 @@ bb3: ; preds = %bb1
%tmp4 = add i32 %c_addr.1, -1 ; <i32> [#uses=1]
%c_addr.1.be = select i1 %tmp2, i32 %tmp3, i32 %tmp4 ; <i32> [#uses=1]
%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
; CHECK: add i32 %lsr.iv, -1
; CHECK: add nsw i32 %lsr.iv, -1
br label %bb6
bb6: ; preds = %bb3, %entry

View File

@ -59,7 +59,7 @@ bb:
; CHECK: loop0:
; Induction variable is initialized to -2.
; CHECK-NEXT: [[PHIIV:%[^ ]+]] = phi i32 [ [[IVNEXT:%[^ ]+]], %loop0 ], [ -2, %bb ]
; CHECK-NEXT: [[IVNEXT]] = add i32 [[PHIIV]], 1
; CHECK-NEXT: [[IVNEXT]] = add nuw nsw i32 [[PHIIV]], 1
; CHECK-NEXT: br i1 false, label %loop0, label %bb0
loop0: ; preds = %loop0, %bb
%i0 = phi i32 [ %i0.next, %loop0 ], [ 0, %bb ] ; <i32> [#uses=2]