From a138c6c73a9e594d82958af6b9ee01108e05e7ac Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Mon, 20 Nov 2006 17:57:22 +0000
Subject: [PATCH] setOperand should not zap the operand list or add implicit
 operands to an instruction.  Doing so breaks the FP stackifier, the alpha
 branch selector the sparc fpmover.

This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31876 91177308-0d34-0410-b5e6-96231b3b80d8
---
 include/llvm/CodeGen/MachineInstr.h |  2 +-
 lib/CodeGen/MachineInstr.cpp        | 39 -----------------------------
 2 files changed, 1 insertion(+), 40 deletions(-)

diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 907985877f0..7ad33f596f7 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -490,7 +490,7 @@ public:
 
   /// setOpcode - Replace the opcode of the current instruction with a new one.
   ///
-  void setOpcode(unsigned Op);
+  void setOpcode(unsigned Op) { Opcode = Op; }
 
   /// RemoveOperand - Erase an operand  from an instruction, leaving it with one
   /// fewer operand than it started with.
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 41e2cdfe83b..16e235a679b 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -180,45 +180,6 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
   }
 }
 
-/// setOpcode - Replace the opcode of the current instruction with a new one.
-///
-void MachineInstr::setOpcode(unsigned Op) {
-  Operands.erase(Operands.begin(), Operands.begin()+NumImplicitOps);
-  NumImplicitOps = 0;
-  Opcode = Op;
-  if (!getParent())
-    return;
-  const TargetInstrDescriptor &TID = getParent()->getParent()->
-    getTarget().getInstrInfo()->get(Op);
-  if (TID.ImplicitDefs)
-    for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs) {
-      MachineOperand Op;
-      Op.opType = MachineOperand::MO_Register;
-      Op.IsDef = true;
-      Op.IsImp = true;
-      Op.IsKill = false;
-      Op.IsDead = false;
-      Op.contents.RegNo = *ImpDefs;
-      Op.offset = 0;
-      Operands.insert(Operands.begin()+NumImplicitOps, Op);
-      NumImplicitOps++;
-    }
-  if (TID.ImplicitUses)
-    for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses) {
-      MachineOperand Op;
-      Op.opType = MachineOperand::MO_Register;
-      Op.IsDef = false;
-      Op.IsImp = true;
-      Op.IsKill = false;
-      Op.IsDead = false;
-      Op.contents.RegNo = *ImpUses;
-      Op.offset = 0;
-      Operands.insert(Operands.begin()+NumImplicitOps, Op);
-      NumImplicitOps++;
-    }
-}
-
-
 void MachineInstr::dump() const {
   std::cerr << "  " << *this;
 }