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Associate a MemOperand with LDWCP nodes introduced during ISel.
This information is required if we want LDWCP to be hoisted out of loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139495 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -169,9 +169,14 @@ SDNode *XCoreDAGToDAGISel::Select(SDNode *N) {
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CurDAG->getTargetConstantPool(ConstantInt::get(
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Type::getInt32Ty(*CurDAG->getContext()), Val),
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TLI.getPointerTy());
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return CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
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MVT::Other, CPIdx,
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CurDAG->getEntryNode());
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SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
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MVT::Other, CPIdx,
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CurDAG->getEntryNode());
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MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1);
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MemOp[0] = MF->getMachineMemOperand(
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MachinePointerInfo::getConstantPool(), MachineMemOperand::MOLoad, 4, 4);
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cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1);
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return node;
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}
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break;
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}
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18
test/CodeGen/XCore/licm-ldwcp.ll
Normal file
18
test/CodeGen/XCore/licm-ldwcp.ll
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@ -0,0 +1,18 @@
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; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
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; MachineLICM should hoist the LDWCP out of the loop.
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; CHECK: f:
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; CHECK-NEXT: ldw [[REG:r[0-9]+]], cp[.LCPI0_0]
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; CHECK-NEXT: .LBB0_1:
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; CHECK-NEXT: stw [[REG]], r0[0]
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; CHECK-NEXT: bu .LBB0_1
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define void @f(i32* nocapture %p) noreturn nounwind {
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entry:
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br label %bb
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bb: ; preds = %bb, %entry
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volatile store i32 525509670, i32* %p, align 4
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br label %bb
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}
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