PowerPC: EH adjustments

This patch adjust the r171506 to make all DWARF enconding pc-relative
for PPC64. It also adds the R_PPC64_REL32 relocation handling in MCJIT
(since the eh_frame will not generate PIC-relative relocation) and also
adds the emission of stubs created by the TTypeEncoding.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171979 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adhemerval Zanella
2013-01-09 17:08:15 +00:00
parent cde8168964
commit a1db5de9e7
5 changed files with 38 additions and 14 deletions

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@ -469,6 +469,7 @@ enum {
R_PPC64_ADDR16_HI = 5, R_PPC64_ADDR16_HI = 5,
R_PPC64_ADDR14 = 7, R_PPC64_ADDR14 = 7,
R_PPC64_REL24 = 10, R_PPC64_REL24 = 10,
R_PPC64_REL32 = 26,
R_PPC64_ADDR64 = 38, R_PPC64_ADDR64 = 38,
R_PPC64_ADDR16_HIGHER = 39, R_PPC64_ADDR16_HIGHER = 39,
R_PPC64_ADDR16_HIGHEST = 41, R_PPC64_ADDR16_HIGHEST = 41,

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@ -523,7 +523,7 @@ void RuntimeDyldELF::resolvePPC64Relocation(const SectionEntry &Section,
case ELF::R_PPC64_ADDR32 : { case ELF::R_PPC64_ADDR32 : {
int32_t Result = static_cast<int32_t>(Value + Addend); int32_t Result = static_cast<int32_t>(Value + Addend);
if (SignExtend32<32>(Result) != Result) if (SignExtend32<32>(Result) != Result)
llvm_unreachable("Relocation R_PPC64_REL32 overflow"); llvm_unreachable("Relocation R_PPC64_ADDR32 overflow");
writeInt32BE(LocalAddress, Result); writeInt32BE(LocalAddress, Result);
} break; } break;
case ELF::R_PPC64_REL24 : { case ELF::R_PPC64_REL24 : {
@ -534,6 +534,13 @@ void RuntimeDyldELF::resolvePPC64Relocation(const SectionEntry &Section,
// Generates a 'bl <address>' instruction // Generates a 'bl <address>' instruction
writeInt32BE(LocalAddress, 0x48000001 | (delta & 0x03FFFFFC)); writeInt32BE(LocalAddress, 0x48000001 | (delta & 0x03FFFFFC));
} break; } break;
case ELF::R_PPC64_REL32 : {
uint64_t FinalAddress = (Section.LoadAddress + Offset);
int32_t delta = static_cast<int32_t>(Value - FinalAddress + Addend);
if (SignExtend32<32>(delta) != delta)
llvm_unreachable("Relocation R_PPC64_REL32 overflow");
writeInt32BE(LocalAddress, delta);
} break;
case ELF::R_PPC64_ADDR64 : case ELF::R_PPC64_ADDR64 :
writeInt64BE(LocalAddress, Value + Addend); writeInt64BE(LocalAddress, Value + Addend);
break; break;

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@ -257,16 +257,13 @@ void MCObjectFileInfo::InitELFMCObjectFileInfo(Triple T) {
? dwarf::DW_EH_PE_udata4 : dwarf::DW_EH_PE_absptr; ? dwarf::DW_EH_PE_udata4 : dwarf::DW_EH_PE_absptr;
} }
} else if (T.getArch() == Triple::ppc64) { } else if (T.getArch() == Triple::ppc64) {
PersonalityEncoding = dwarf::DW_EH_PE_udata8; PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |
PersonalityEncoding |= (RelocM == Reloc::PIC_) dwarf::DW_EH_PE_udata8;
? dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel FDECFIEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4;
: dwarf::DW_EH_PE_absptr; LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8;
unsigned PICFlag = (RelocM == Reloc::PIC_) ? dwarf::DW_EH_PE_pcrel FDEEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8;
: dwarf::DW_EH_PE_absptr; TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |
FDECFIEncoding = PICFlag | dwarf::DW_EH_PE_sdata4; dwarf::DW_EH_PE_udata8;
LSDAEncoding = PICFlag | dwarf::DW_EH_PE_udata8;
FDEEncoding = PICFlag | dwarf::DW_EH_PE_sdata4;
TTypeEncoding = PICFlag | dwarf::DW_EH_PE_sdata4;
} }
// Solaris requires different flags for .eh_frame to seemingly every other // Solaris requires different flags for .eh_frame to seemingly every other

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@ -768,6 +768,25 @@ bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
} }
} }
MachineModuleInfoELF &MMIELF =
MMI->getObjFileInfo<MachineModuleInfoELF>();
MachineModuleInfoELF::SymbolListTy Stubs = MMIELF.GetGVStubList();
if (!Stubs.empty()) {
OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
// L_foo$stub:
OutStreamer.EmitLabel(Stubs[i].first);
// .long _foo
OutStreamer.EmitValue(MCSymbolRefExpr::Create(Stubs[i].second.getPointer(),
OutContext),
isPPC64 ? 8 : 4/*size*/, 0/*addrspace*/);
}
Stubs.clear();
OutStreamer.AddBlankLine();
}
return AsmPrinter::doFinalization(M); return AsmPrinter::doFinalization(M);
} }

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@ -20,7 +20,7 @@ entry:
; STATIC-NEXT: ('sh_info', 0x00000000) ; STATIC-NEXT: ('sh_info', 0x00000000)
; STATIC-NEXT: ('sh_addralign', 0x0000000000000008) ; STATIC-NEXT: ('sh_addralign', 0x0000000000000008)
; STATIC-NEXT: ('sh_entsize', 0x0000000000000000) ; STATIC-NEXT: ('sh_entsize', 0x0000000000000000)
; STATIC-NEXT: ('_section_data', '00000010 00000000 017a5200 01784101 0b0c0100 00000010 00000018 00000000 00000010 00000000') ; STATIC-NEXT: ('_section_data', '00000010 00000000 017a5200 01784101 1b0c0100 00000010 00000018 00000000 00000010 00000000')
; STATIC: ('sh_name', 0x{{.*}}) # '.rela.eh_frame' ; STATIC: ('sh_name', 0x{{.*}}) # '.rela.eh_frame'
; STATIC-NEXT: ('sh_type', 0x00000004) ; STATIC-NEXT: ('sh_type', 0x00000004)
@ -34,11 +34,11 @@ entry:
; STATIC-NEXT: ('sh_entsize', 0x0000000000000018) ; STATIC-NEXT: ('sh_entsize', 0x0000000000000018)
; STATIC-NEXT: ('_relocations', [ ; STATIC-NEXT: ('_relocations', [
; Static build should create R_PPC64_ADDR32 relocations ; Static build should create R_PPC64_REL32 relocations
; STATIC-NEXT: # Relocation 0 ; STATIC-NEXT: # Relocation 0
; STATIC-NEXT: (('r_offset', 0x000000000000001c) ; STATIC-NEXT: (('r_offset', 0x000000000000001c)
; STATIC-NEXT: ('r_sym', 0x{{.*}}) ; STATIC-NEXT: ('r_sym', 0x{{.*}})
; STATIC-NEXT: ('r_type', 0x00000001) ; STATIC-NEXT: ('r_type', 0x0000001a)
; STATIC-NEXT: ('r_addend', 0x0000000000000000) ; STATIC-NEXT: ('r_addend', 0x0000000000000000)
; STATIC-NEXT: ), ; STATIC-NEXT: ),
; STATIC-NEXT: ]) ; STATIC-NEXT: ])