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Pass address space to isLegalAddressingMode in DAGCombiner

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No test because I don't know of a target that makes use
of address spaces and indexed load / store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239051 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2015-06-04 16:17:34 +00:00
parent e0d4034b76
commit a1f2f389f6
1 changed files with 5 additions and 1 deletions
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6
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -9061,14 +9061,18 @@ static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
SelectionDAG &DAG,
const TargetLowering &TLI) {
EVT VT;
unsigned AS;
if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Use)) {
if (LD->isIndexed() || LD->getBasePtr().getNode() != N)
return false;
VT = LD->getMemoryVT();
AS = LD->getAddressSpace();
} else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(Use)) {
if (ST->isIndexed() || ST->getBasePtr().getNode() != N)
return false;
VT = ST->getMemoryVT();
AS = ST->getAddressSpace();
} else
return false;
@ -9092,7 +9096,7 @@ static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
} else
return false;
return TLI.isLegalAddressingMode(AM, VT.getTypeForEVT(*DAG.getContext()));
return TLI.isLegalAddressingMode(AM, VT.getTypeForEVT(*DAG.getContext()), AS);
}
/// Try turning a load/store into a pre-indexed load/store when the base