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Make the ARM ABI selectable via SubtargetFeature.
This patch makes it possible to select the ABI with -mattr. It will be used to forward clang's -target-abi option to llvm's CodeGen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198304 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -255,6 +255,14 @@ def ProcKrait : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
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FeatureHWDiv,
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FeatureHWDivARM]>;
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def FeatureAPCS : SubtargetFeature<"apcs", "TargetABI", "ARM_ABI_APCS",
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"Use the APCS ABI">;
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def FeatureAAPCS : SubtargetFeature<"aapcs", "TargetABI", "ARM_ABI_AAPCS",
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"Use the AAPCS ABI">;
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class ProcNoItin<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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@ -83,7 +83,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
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, CPUString(CPU)
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, TargetTriple(TT)
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, Options(Options)
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, TargetABI(ARM_ABI_APCS) {
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, TargetABI(ARM_ABI_UNKNOWN) {
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initializeEnvironment();
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resetSubtargetFeatures(CPU, FS);
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}
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@ -189,18 +189,22 @@ void ARMSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) {
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// Initialize scheduling itinerary for the specified CPU.
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InstrItins = getInstrItineraryForCPU(CPUString);
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switch (TargetTriple.getEnvironment()) {
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case Triple::Android:
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case Triple::EABI:
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case Triple::EABIHF:
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case Triple::GNUEABI:
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case Triple::GNUEABIHF:
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TargetABI = ARM_ABI_AAPCS;
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break;
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default:
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if (isTargetIOS() && isMClass())
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if (TargetABI == ARM_ABI_UNKNOWN) {
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switch (TargetTriple.getEnvironment()) {
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case Triple::Android:
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case Triple::EABI:
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case Triple::EABIHF:
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case Triple::GNUEABI:
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case Triple::GNUEABIHF:
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TargetABI = ARM_ABI_AAPCS;
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break;
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break;
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default:
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if (isTargetIOS() && isMClass())
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TargetABI = ARM_ABI_AAPCS;
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else
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TargetABI = ARM_ABI_APCS;
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break;
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}
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}
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if (isAAPCS_ABI())
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@ -217,6 +217,7 @@ protected:
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public:
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enum {
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ARM_ABI_UNKNOWN,
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ARM_ABI_APCS,
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ARM_ABI_AAPCS // ARM EABI
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} TargetABI;
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@ -326,8 +327,14 @@ public:
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TargetTriple.getEnvironment() == Triple::EABIHF;
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}
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bool isAPCS_ABI() const { return TargetABI == ARM_ABI_APCS; }
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bool isAAPCS_ABI() const { return TargetABI == ARM_ABI_AAPCS; }
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bool isAPCS_ABI() const {
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assert(TargetABI != ARM_ABI_UNKNOWN);
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return TargetABI == ARM_ABI_APCS;
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}
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bool isAAPCS_ABI() const {
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assert(TargetABI != ARM_ABI_UNKNOWN);
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return TargetABI == ARM_ABI_AAPCS;
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}
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bool isThumb() const { return InThumbMode; }
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bool isThumb1Only() const { return InThumbMode && !HasThumb2; }
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28
test/CodeGen/ARM/arm-abi-attr.ll
Normal file
28
test/CodeGen/ARM/arm-abi-attr.ll
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@ -0,0 +1,28 @@
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; RUN: llc -mtriple=arm-linux < %s | FileCheck %s --check-prefix=APCS
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; RUN: llc -mtriple=arm-linux -mattr=apcs < %s | \
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; RUN: FileCheck %s --check-prefix=APCS
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; RUN: llc -mtriple=arm-linux-gnueabi -mattr=apcs < %s | \
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; RUN: FileCheck %s --check-prefix=APCS
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; RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s --check-prefix=AAPCS
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; RUN: llc -mtriple=arm-linux-gnueabi -mattr=aapcs < %s | \
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; RUN: FileCheck %s --check-prefix=AAPCS
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; RUN: llc -mtriple=arm-linux-gnu -mattr=aapcs < %s | \
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; RUN: FileCheck %s --check-prefix=AAPCS
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; The stack is 8 byte aligned on AAPCS and 4 on APCS, so we should get a BIC
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; only on APCS.
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define void @g() {
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; APCS: sub sp, sp, #8
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; APCS: bic sp, sp, #7
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; AAPCS: sub sp, sp, #8
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; AAPCS-NOT: bic
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%c = alloca i8, align 8
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call void @f(i8* %c)
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ret void
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}
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declare void @f(i8*)
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