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https://github.com/c64scene-ar/llvm-6502.git
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Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67335 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -234,7 +234,7 @@ static bool isTwoAddrUse(MachineInstr *UseMI, unsigned Reg) {
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for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
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MachineOperand &MO = UseMI->getOperand(i);
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if (MO.isReg() && MO.getReg() == Reg &&
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(MO.isDef() || TID.getOperandConstraint(i, TOI::TIED_TO) != -1))
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(MO.isDef() || UseMI->isRegTiedToDefOperand(i)))
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// Earlier use is a two-address one.
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return true;
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}
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@@ -338,8 +338,8 @@ static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) {
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const MachineOperand &MO = MI.getOperand(i);
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if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg)
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continue;
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int ti = TID.getOperandConstraint(i, TOI::TIED_TO);
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if (ti != -1) {
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unsigned ti;
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if (MI.isRegTiedToDefOperand(i, &ti)) {
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DstReg = MI.getOperand(ti).getReg();
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return true;
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}
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@@ -635,8 +635,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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ProcessCopy(&*mi, &*mbbi, Processed);
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for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) {
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int ti = TID.getOperandConstraint(si, TOI::TIED_TO);
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if (ti == -1)
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unsigned ti = 0;
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if (!mi->isRegTiedToDefOperand(si, &ti))
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continue;
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if (FirstTied) {
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@@ -669,7 +669,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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// b + a for example) because our transformation will not work. This
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// should never occur because we are in SSA form.
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for (unsigned i = 0; i != mi->getNumOperands(); ++i)
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assert((int)i == ti ||
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assert(i == ti ||
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!mi->getOperand(i).isReg() ||
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mi->getOperand(i).getReg() != regA);
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#endif
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