Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67335 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2009-03-19 20:30:06 +00:00
parent 817046e1f1
commit a24752ff43
6 changed files with 42 additions and 24 deletions
+6 -6
View File
@@ -234,7 +234,7 @@ static bool isTwoAddrUse(MachineInstr *UseMI, unsigned Reg) {
for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
MachineOperand &MO = UseMI->getOperand(i);
if (MO.isReg() && MO.getReg() == Reg &&
(MO.isDef() || TID.getOperandConstraint(i, TOI::TIED_TO) != -1))
(MO.isDef() || UseMI->isRegTiedToDefOperand(i)))
// Earlier use is a two-address one.
return true;
}
@@ -338,8 +338,8 @@ static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) {
const MachineOperand &MO = MI.getOperand(i);
if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg)
continue;
int ti = TID.getOperandConstraint(i, TOI::TIED_TO);
if (ti != -1) {
unsigned ti;
if (MI.isRegTiedToDefOperand(i, &ti)) {
DstReg = MI.getOperand(ti).getReg();
return true;
}
@@ -635,8 +635,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
ProcessCopy(&*mi, &*mbbi, Processed);
for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) {
int ti = TID.getOperandConstraint(si, TOI::TIED_TO);
if (ti == -1)
unsigned ti = 0;
if (!mi->isRegTiedToDefOperand(si, &ti))
continue;
if (FirstTied) {
@@ -669,7 +669,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
// b + a for example) because our transformation will not work. This
// should never occur because we are in SSA form.
for (unsigned i = 0; i != mi->getNumOperands(); ++i)
assert((int)i == ti ||
assert(i == ti ||
!mi->getOperand(i).isReg() ||
mi->getOperand(i).getReg() != regA);
#endif