Remove the old-style ARM disassembler, which is no longer used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144243 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2011-11-09 23:56:06 +00:00
parent 3c5d6e4df4
commit a25e292d5f
4 changed files with 0 additions and 1847 deletions

File diff suppressed because it is too large Load Diff

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@ -1,49 +0,0 @@
//===------------ ARMDecoderEmitter.h - Decoder Generator -------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file is part of the ARM Disassembler.
// It contains the tablegen backend declaration ARMDecoderEmitter.
//
//===----------------------------------------------------------------------===//
#ifndef ARMDECODEREMITTER_H
#define ARMDECODEREMITTER_H
#include "llvm/Support/DataTypes.h"
#include "llvm/TableGen/TableGenBackend.h"
namespace llvm {
class ARMDecoderEmitter : public TableGenBackend {
RecordKeeper &Records;
public:
ARMDecoderEmitter(RecordKeeper &R) : Records(R) {
initBackend();
}
~ARMDecoderEmitter() {
shutdownBackend();
}
// run - Output the code emitter
void run(raw_ostream &o);
private:
// Helper class for ARMDecoderEmitter.
class ARMDEBackend;
ARMDEBackend *Backend;
void initBackend();
void shutdownBackend();
};
} // end llvm namespace
#endif

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@ -11,7 +11,6 @@
#include "CodeGenTarget.h"
#include "X86DisassemblerTables.h"
#include "X86RecognizableInstr.h"
#include "ARMDecoderEmitter.h"
#include "FixedLenDecoderEmitter.h"
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/Record.h"

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@ -23,7 +23,6 @@
#include "IntrinsicEmitter.h"
#include "PseudoLoweringEmitter.h"
#include "RegisterInfoEmitter.h"
#include "ARMDecoderEmitter.h"
#include "SubtargetEmitter.h"
#include "SetTheory.h"
@ -44,7 +43,6 @@ enum ActionType {
GenInstrInfo,
GenAsmWriter,
GenAsmMatcher,
GenARMDecoder,
GenDisassembler,
GenPseudoLowering,
GenCallingConv,
@ -73,8 +71,6 @@ namespace {
"Generate calling convention descriptions"),
clEnumValN(GenAsmWriter, "gen-asm-writer",
"Generate assembly writer"),
clEnumValN(GenARMDecoder, "gen-arm-decoder",
"Generate decoders for ARM/Thumb"),
clEnumValN(GenDisassembler, "gen-disassembler",
"Generate disassembler"),
clEnumValN(GenPseudoLowering, "gen-pseudo-lowering",
@ -126,9 +122,6 @@ public:
case GenAsmWriter:
AsmWriterEmitter(Records).run(OS);
break;
case GenARMDecoder:
ARMDecoderEmitter(Records).run(OS);
break;
case GenAsmMatcher:
AsmMatcherEmitter(Records).run(OS);
break;