From a28bc686fa4f2375237aeab58530126462ae9b41 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 19 Mar 2010 00:40:22 +0000 Subject: [PATCH] make inst_begin/inst_end iterate over InstructionsByEnumValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98912 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/AsmWriterEmitter.cpp | 6 +++--- utils/TableGen/CodeGenTarget.cpp | 30 ++++++++++++++--------------- utils/TableGen/CodeGenTarget.h | 18 ++++++++--------- utils/TableGen/InstrEnumEmitter.cpp | 4 ++-- utils/TableGen/InstrInfoEmitter.cpp | 4 ++-- 5 files changed, 31 insertions(+), 31 deletions(-) diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index 9378343cec7..ab1e239a95f 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -254,10 +254,10 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) { for (CodeGenTarget::inst_iterator I = Target.inst_begin(), E = Target.inst_end(); I != E; ++I) - if (!I->second.AsmString.empty() && - I->second.TheDef->getName() != "PHI") + if (!(*I)->AsmString.empty() && + (*I)->TheDef->getName() != "PHI") Instructions.push_back( - AsmWriterInst(I->second, + AsmWriterInst(**I, AsmWriter->getValueAsInt("Variant"), AsmWriter->getValueAsInt("FirstOperandColumn"), AsmWriter->getValueAsInt("OperandSpacing"))); diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 36a9d1ef923..0dbc70cf90a 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -123,7 +123,7 @@ std::string CodeGenTarget::getInstNamespace() const { std::string InstNS; for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) { - InstNS = i->second.Namespace; + InstNS = (*i)->Namespace; // Make sure not to pick up "TargetInstrInfo" by accidentally getting // the namespace off the PHI instruction or something. @@ -300,7 +300,7 @@ GetInstByName(const char *Name, /// getInstructionsByEnumValue - Return all of the instructions defined by the /// target, ordered by their enum value. -void CodeGenTarget::ComputeInstrsByEnum() { +void CodeGenTarget::ComputeInstrsByEnum() const { const std::map &Insts = getInstructions(); const CodeGenInstruction *PHI = GetInstByName("PHI", Insts); const CodeGenInstruction *INLINEASM = GetInstByName("INLINEASM", Insts); @@ -333,19 +333,19 @@ void CodeGenTarget::ComputeInstrsByEnum() { InstrsByEnum.push_back(COPY_TO_REGCLASS); InstrsByEnum.push_back(DBG_VALUE); for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) - if (&II->second != PHI && - &II->second != INLINEASM && - &II->second != DBG_LABEL && - &II->second != EH_LABEL && - &II->second != GC_LABEL && - &II->second != KILL && - &II->second != EXTRACT_SUBREG && - &II->second != INSERT_SUBREG && - &II->second != IMPLICIT_DEF && - &II->second != SUBREG_TO_REG && - &II->second != COPY_TO_REGCLASS && - &II->second != DBG_VALUE) - InstrsByEnum.push_back(&II->second); + if (*II != PHI && + *II != INLINEASM && + *II != DBG_LABEL && + *II != EH_LABEL && + *II != GC_LABEL && + *II != KILL && + *II != EXTRACT_SUBREG && + *II != INSERT_SUBREG && + *II != IMPLICIT_DEF && + *II != SUBREG_TO_REG && + *II != COPY_TO_REGCLASS && + *II != DBG_VALUE) + InstrsByEnum.push_back(*II); } diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h index ac6574d69ab..a0e631e1093 100644 --- a/utils/TableGen/CodeGenTarget.h +++ b/utils/TableGen/CodeGenTarget.h @@ -71,7 +71,7 @@ class CodeGenTarget { void ReadInstructions() const; void ReadLegalValueTypes() const; - std::vector InstrsByEnum; + mutable std::vector InstrsByEnum; public: CodeGenTarget(); @@ -205,25 +205,25 @@ public: CodeGenInstruction &getInstruction(const Record *InstRec) const; - typedef std::map::const_iterator inst_iterator; - inst_iterator inst_begin() const { return getInstructions().begin(); } - inst_iterator inst_end() const { return Instructions.end(); } - /// getInstructionsByEnumValue - Return all of the instructions defined by the /// target, ordered by their enum value. - const std::vector &getInstructionsByEnumValue() { + const std::vector & + getInstructionsByEnumValue() const { if (InstrsByEnum.empty()) ComputeInstrsByEnum(); return InstrsByEnum; } - + typedef std::vector::const_iterator inst_iterator; + inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();} + inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); } + + /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]? /// bool isLittleEndianEncoding() const; private: - void ComputeInstrsByEnum(); + void ComputeInstrsByEnum() const; }; /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern diff --git a/utils/TableGen/InstrEnumEmitter.cpp b/utils/TableGen/InstrEnumEmitter.cpp index 4162107bce9..06c95f27b65 100644 --- a/utils/TableGen/InstrEnumEmitter.cpp +++ b/utils/TableGen/InstrEnumEmitter.cpp @@ -29,8 +29,8 @@ void InstrEnumEmitter::run(raw_ostream &OS) { std::string Namespace; for (CodeGenTarget::inst_iterator II = Target.inst_begin(), E = Target.inst_end(); II != E; ++II) { - if (II->second.Namespace != "TargetOpcode") { - Namespace = II->second.Namespace; + if ((*II)->Namespace != "TargetOpcode") { + Namespace = (*II)->Namespace; break; } } diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index 83602bb65c4..72c4e73ca1b 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -149,7 +149,7 @@ void InstrInfoEmitter::EmitOperandInfo(raw_ostream &OS, const CodeGenTarget &Target = CDP.getTargetInfo(); for (CodeGenTarget::inst_iterator II = Target.inst_begin(), E = Target.inst_end(); II != E; ++II) { - std::vector OperandInfo = GetOperandInfo(II->second); + std::vector OperandInfo = GetOperandInfo(**II); unsigned &N = OperandInfoIDs[OperandInfo]; if (N != 0) continue; @@ -214,7 +214,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) { // Emit all of the instruction's implicit uses and defs. for (CodeGenTarget::inst_iterator II = Target.inst_begin(), E = Target.inst_end(); II != E; ++II) { - Record *Inst = II->second.TheDef; + Record *Inst = (*II)->TheDef; std::vector Uses = Inst->getValueAsListOfDefs("Uses"); if (!Uses.empty()) { unsigned &IL = EmittedLists[Uses];