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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-30 17:25:21 +00:00
Remove separate vector of implicit refs from MachineInstr, and
instead record them as extra operands in the operands[] vector. Also, move CallArgsDescriptor into this class instead of making it an annotation on the machine instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4399 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -19,24 +19,33 @@ extern const MachineInstrDescriptor *TargetInstrDescriptors;
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// Constructor for instructions with fixed #operands (nearly all)
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MachineInstr::MachineInstr(MachineOpCode _opCode)
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: opCode(_opCode),
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operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()) {
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operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()),
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numImplicitRefs(0)
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{
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assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
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}
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// Constructor for instructions with variable #operands
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MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands)
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: opCode(OpCode), operands(numOperands, MachineOperand()) {
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: opCode(OpCode),
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operands(numOperands, MachineOperand()),
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numImplicitRefs(0)
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{
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}
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MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
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bool XX, bool YY) : opCode(Opcode) {
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bool XX, bool YY)
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: opCode(Opcode),
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numImplicitRefs(0)
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{
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operands.reserve(numOperands);
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}
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// OperandComplete - Return true if it's illegal to add a new operand
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bool MachineInstr::OperandsComplete() const {
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bool MachineInstr::OperandsComplete() const
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{
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int NumOperands = TargetInstrDescriptors[opCode].numOperands;
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if (NumOperands >= 0 && operands.size() >= (unsigned)NumOperands)
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if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
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return true; // Broken!
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return false;
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}
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@@ -47,7 +56,10 @@ bool MachineInstr::OperandsComplete() const {
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// This only resets the size of the operand vector and initializes it.
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// The new operands must be set explicitly later.
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//
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void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands) {
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void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands)
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{
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assert(getNumImplicitRefs() == 0 &&
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"This is probably broken because implicit refs are going to be lost.");
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opCode = Opcode;
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operands.clear();
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operands.resize(numOperands, MachineOperand());
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@@ -60,7 +72,7 @@ MachineInstr::SetMachineOperandVal(unsigned i,
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bool isdef,
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bool isDefAndUse)
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{
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assert(i < operands.size());
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assert(i < operands.size()); // may be explicit or implicit op
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operands[i].opType = opType;
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operands[i].value = V;
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operands[i].regNum = -1;
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@@ -77,7 +89,7 @@ MachineInstr::SetMachineOperandConst(unsigned i,
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MachineOperand::MachineOperandType operandType,
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int64_t intValue)
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{
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assert(i < operands.size());
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assert(i < getNumOperands()); // must be explicit op
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assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
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"immed. constant cannot be defined");
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@@ -92,7 +104,7 @@ void
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MachineInstr::SetMachineOperandReg(unsigned i,
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int regNum,
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bool isdef) {
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assert(i < operands.size());
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assert(i < getNumOperands()); // must be explicit op
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operands[i].opType = MachineOperand::MO_MachineRegister;
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operands[i].value = NULL;
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@@ -107,6 +119,7 @@ MachineInstr::SetMachineOperandReg(unsigned i,
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void
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MachineInstr::SetRegForOperand(unsigned i, int regNum)
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{
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assert(i < getNumOperands()); // must be explicit op
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operands[i].setRegForValue(regNum);
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insertUsedReg(regNum);
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}
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@@ -129,11 +142,11 @@ MachineInstr::substituteValue(const Value* oldVal, Value* newVal, bool defsOnly)
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}
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// Subsitute implicit refs
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for (unsigned i=0, N=implicitRefs.size(); i < N; ++i)
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for (unsigned i=0, N=getNumImplicitRefs(); i < N; ++i)
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if (getImplicitRef(i) == oldVal)
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if (!defsOnly || implicitRefIsDefined(i))
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{
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implicitRefs[i].Val = newVal;
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getImplicitOp(i).value = newVal;
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++numSubst;
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}
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@@ -6,18 +6,17 @@
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineInstrAnnot.h"
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#include "llvm/Annotation.h"
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/CodeGen/InstrSelectionSupport.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/iOther.h"
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#include "llvm/Type.h"
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AnnotationID CallArgsDescriptor::AID(AnnotationManager::
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getID("CodeGen::CallArgsDescriptor"));
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CallArgsDescriptor::CallArgsDescriptor(const CallInst* _callInstr,
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TmpInstruction* _retAddrReg,
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bool _isVarArgs, bool _noPrototype)
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: Annotation(AID),
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callInstr(_callInstr),
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: callInstr(_callInstr),
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funcPtr(isa<Function>(_callInstr->getCalledValue())
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? NULL : _callInstr->getCalledValue()),
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retAddrReg(_retAddrReg),
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@@ -30,6 +29,10 @@ CallArgsDescriptor::CallArgsDescriptor(const CallInst* _callInstr,
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&& "Operand 0 is ignored in the loop below!");
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for (unsigned int i=1; i < numArgs; ++i)
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argInfoVec.push_back(CallArgInfo(callInstr->getOperand(i)));
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// Enter this object in the MachineCodeForInstr object of the CallInst.
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// This transfers ownership of this object.
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MachineCodeForInstruction::get(callInstr).setCallArgsDescriptor(this);
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}
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@@ -38,3 +41,26 @@ CallArgsDescriptor::getReturnValue() const
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{
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return (callInstr->getType() == Type::VoidTy? NULL : callInstr);
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}
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// Mechanism to get the descriptor for a CALL MachineInstr.
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// We get the LLVM CallInstr from the ret. addr. register argument
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// of the CALL MachineInstr, then get the CallArgsDescriptor from the
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// MachineCodeForInstruction object for the CallInstr.
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// This is roundabout but avoids adding a new map or annotation just
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// to keep track of CallArgsDescriptors.
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//
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CallArgsDescriptor *CallArgsDescriptor::get(const MachineInstr* MI)
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{
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const TmpInstruction* retAddrReg =
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cast<TmpInstruction>(MI->getImplicitRef(MI->getNumImplicitRefs()-1));
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assert(retAddrReg->getNumOperands() == 1 &&
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isa<CallInst>(retAddrReg->getOperand(0)) &&
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"Order of implicit args of CALL instr. changed. FIX THIS CODE!");
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const CallInst* callInstr = cast<CallInst>(retAddrReg->getOperand(0));
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CallArgsDescriptor* desc =
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MachineCodeForInstruction::get(callInstr).getCallArgsDescriptor();
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assert(desc->getCallInst()==callInstr && "Incorrect call args descriptor?");
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return desc;
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}
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