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* Add the lost fix to define the second reg of a 2-reg representation of longs
* Fix opcode RLWNM -> RLWINM since it uses an immediate const shift value git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15087 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1154,6 +1154,9 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
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BB = sinkMBB;
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BuildMI(BB, PPC32::PHI, 4, DestReg).addReg(FalseValue)
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.addMBB(copy0MBB).addReg(TrueValue).addMBB(copy1MBB);
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// For a register pair representing a long value, define the second reg
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if (getClass(TrueVal->getType()) == cLong)
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BuildMI(BB, PPC32::LI, 1, DestReg+1).addImm(0);
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return;
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}
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@ -2801,7 +2804,7 @@ void ISel::visitAllocaInst(AllocaInst &I) {
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// AlignedSize = and <AddedSize>, ~15
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unsigned AlignedSize = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, PPC32::RLWNM, 4, AlignedSize).addReg(AddedSizeReg).addImm(0)
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BuildMI(BB, PPC32::RLWINM, 4, AlignedSize).addReg(AddedSizeReg).addImm(0)
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.addImm(0).addImm(27);
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// Subtract size from stack pointer, thereby allocating some space.
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@ -1154,6 +1154,9 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
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BB = sinkMBB;
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BuildMI(BB, PPC32::PHI, 4, DestReg).addReg(FalseValue)
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.addMBB(copy0MBB).addReg(TrueValue).addMBB(copy1MBB);
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// For a register pair representing a long value, define the second reg
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if (getClass(TrueVal->getType()) == cLong)
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BuildMI(BB, PPC32::LI, 1, DestReg+1).addImm(0);
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return;
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}
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@ -2801,7 +2804,7 @@ void ISel::visitAllocaInst(AllocaInst &I) {
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// AlignedSize = and <AddedSize>, ~15
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unsigned AlignedSize = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, PPC32::RLWNM, 4, AlignedSize).addReg(AddedSizeReg).addImm(0)
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BuildMI(BB, PPC32::RLWINM, 4, AlignedSize).addReg(AddedSizeReg).addImm(0)
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.addImm(0).addImm(27);
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// Subtract size from stack pointer, thereby allocating some space.
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