mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-17 21:29:20 +00:00
Make assertion stricter. Since the source operands are allocated at
this point, the second operand must be a physical register (it cannot be a virtual one). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10292 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
49787e35c3
commit
a327e7fea9
@ -583,7 +583,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
|
||||
if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
|
||||
// must be same register number as the first operand
|
||||
// This maps a = b + c into b += c, and saves b into a's spot
|
||||
assert(MI->getOperand(1).isRegister() &&
|
||||
assert(MI->getOperand(1).isPhysicalRegister() &&
|
||||
MI->getOperand(1).getAllocatedRegNum() &&
|
||||
MI->getOperand(1).opIsUse() &&
|
||||
"Two address instruction invalid!");
|
||||
|
Loading…
Reference in New Issue
Block a user