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https://github.com/c64scene-ar/llvm-6502.git
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kill SelectCALL() in the DAG isel, we handle this in lowering now, like
SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about ISD::CALL/TAILCALL) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24941 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -94,7 +94,6 @@ namespace {
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private:
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SDOperand SelectDIV(SDOperand Op);
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SDOperand SelectCALL(SDOperand Op);
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};
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}
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@ -327,191 +326,6 @@ SDOperand IA64DAGToDAGISel::SelectDIV(SDOperand Op) {
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return Result;
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}
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SDOperand IA64DAGToDAGISel::SelectCALL(SDOperand Op) {
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SDNode *N = Op.Val;
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SDOperand Chain = Select(N->getOperand(0));
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unsigned CallOpcode;
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std::vector<SDOperand> CallOperands;
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// save the current GP, SP and RP : FIXME: do we need to do all 3 always?
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SDOperand GPBeforeCall = CurDAG->getCopyFromReg(Chain, IA64::r1, MVT::i64);
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Chain = GPBeforeCall.getValue(1);
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SDOperand SPBeforeCall = CurDAG->getCopyFromReg(Chain, IA64::r12, MVT::i64);
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Chain = SPBeforeCall.getValue(1);
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SDOperand RPBeforeCall = CurDAG->getCopyFromReg(Chain, IA64::rp, MVT::i64);
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Chain = RPBeforeCall.getValue(1);
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// if we can call directly, do so
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if (GlobalAddressSDNode *GASD =
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dyn_cast<GlobalAddressSDNode>(N->getOperand(1))) {
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CallOpcode = IA64::BRCALL_IPREL;
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CallOperands.push_back(CurDAG->getTargetGlobalAddress(GASD->getGlobal(),
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MVT::i64));
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} else if (ExternalSymbolSDNode *ESSDN = // FIXME: we currently NEED this
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// case for correctness, to avoid
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// "non-pic code with imm reloc.n
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// against dynamic symbol" errors
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dyn_cast<ExternalSymbolSDNode>(N->getOperand(1))) {
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CallOpcode = IA64::BRCALL_IPREL;
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CallOperands.push_back(N->getOperand(1));
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} else {
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// otherwise we need to load the function descriptor,
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// load the branch target (function)'s entry point and GP,
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// branch (call) then restore the GP
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SDOperand FnDescriptor = Select(N->getOperand(1));
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// load the branch target's entry point [mem] and
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// GP value [mem+8]
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SDOperand targetEntryPoint=CurDAG->getTargetNode(IA64::LD8, MVT::i64,
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FnDescriptor);
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Chain = targetEntryPoint.getValue(1);
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SDOperand targetGPAddr=CurDAG->getTargetNode(IA64::ADDS, MVT::i64,
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FnDescriptor, CurDAG->getConstant(8, MVT::i64));
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Chain = targetGPAddr.getValue(1);
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SDOperand targetGP=CurDAG->getTargetNode(IA64::LD8, MVT::i64,
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targetGPAddr);
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Chain = targetGP.getValue(1);
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/* FIXME? (methcall still fails)
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SDOperand targetEntryPoint=CurDAG->getLoad(MVT::i64, Chain, FnDescriptor,
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CurDAG->getSrcValue(0));
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SDOperand targetGPAddr=CurDAG->getNode(ISD::ADD, MVT::i64, FnDescriptor,
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CurDAG->getConstant(8, MVT::i64));
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SDOperand targetGP=CurDAG->getLoad(MVT::i64, Chain, targetGPAddr,
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CurDAG->getSrcValue(0));
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*/
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/* this is just the long way of writing the two lines below?
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// Copy the callee GP into r1
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SDOperand r1 = CurDAG->getRegister(IA64::r1, MVT::i64);
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Chain = CurDAG->getNode(ISD::CopyToReg, MVT::i64, Chain, r1,
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targetGP);
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// Copy the callee address into the b6 branch register
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SDOperand B6 = CurDAG->getRegister(IA64::B6, MVT::i64);
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Chain = CurDAG->getNode(ISD::CopyToReg, MVT::i64, Chain, B6,
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targetEntryPoint);
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*/
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Chain = CurDAG->getCopyToReg(Chain, IA64::r1, targetGP);
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Chain = CurDAG->getCopyToReg(Chain, IA64::B6, targetEntryPoint);
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CallOperands.push_back(CurDAG->getRegister(IA64::B6, MVT::i64));
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CallOpcode = IA64::BRCALL_INDIRECT;
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}
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// see section 8.5.8 of "Itanium Software Conventions and
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// Runtime Architecture Guide to see some examples of what's going
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// on here. (in short: int args get mapped 1:1 'slot-wise' to out0->out7,
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// while FP args get mapped to F8->F15 as needed)
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// TODO: support in-memory arguments
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unsigned used_FPArgs=0; // how many FP args have been used so far?
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unsigned intArgs[] = {IA64::out0, IA64::out1, IA64::out2, IA64::out3,
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IA64::out4, IA64::out5, IA64::out6, IA64::out7 };
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unsigned FPArgs[] = {IA64::F8, IA64::F9, IA64::F10, IA64::F11,
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IA64::F12, IA64::F13, IA64::F14, IA64::F15 };
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SDOperand InFlag; // Null incoming flag value.
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for (unsigned i = 2, e = N->getNumOperands(); i != e; ++i) {
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unsigned DestReg = 0;
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MVT::ValueType RegTy = N->getOperand(i).getValueType();
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if (RegTy == MVT::i64) {
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assert((i-2) < 8 && "Too many int args");
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DestReg = intArgs[i-2];
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} else {
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assert(MVT::isFloatingPoint(N->getOperand(i).getValueType()) &&
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"Unpromoted integer arg?");
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assert(used_FPArgs < 8 && "Too many fp args");
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DestReg = FPArgs[used_FPArgs++];
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}
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if (N->getOperand(i).getOpcode() != ISD::UNDEF) {
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SDOperand Val = Select(N->getOperand(i));
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if(MVT::isInteger(N->getOperand(i).getValueType())) {
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Chain = CurDAG->getCopyToReg(Chain, DestReg, Val, InFlag);
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InFlag = Chain.getValue(1);
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CallOperands.push_back(CurDAG->getRegister(DestReg, RegTy));
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}
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// some functions (e.g. printf) want floating point arguments
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// *also* passed as in-memory representations in integer registers
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// this is FORTRAN legacy junk which we don't _always_ need
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// to do, but to be on the safe side, we do.
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else if(MVT::isFloatingPoint(N->getOperand(i).getValueType())) {
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assert((i-2) < 8 && "FP args alone would fit, but no int regs left");
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// first copy into the appropriate FP reg
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Chain = CurDAG->getCopyToReg(Chain, DestReg, Val);
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// then copy into the appropriate integer reg
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DestReg = intArgs[i-2];
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// GETFD takes an FP reg and writes a GP reg
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Chain = CurDAG->getTargetNode(IA64::GETFD, MVT::i64, Val);
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// FIXME: this next line is a bit unfortunate
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Chain = CurDAG->getCopyToReg(Chain, DestReg, Chain, InFlag);
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InFlag = Chain.getValue(1);
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CallOperands.push_back(CurDAG->getRegister(DestReg, MVT::i64));
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}
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}
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}
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// Finally, once everything is in registers to pass to the call, emit the
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// call itself.
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if (InFlag.Val)
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CallOperands.push_back(InFlag); // Strong dep on register copies.
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else
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CallOperands.push_back(Chain); // Weak dep on whatever occurs before
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Chain = CurDAG->getTargetNode(CallOpcode, MVT::Other, MVT::Flag,
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CallOperands);
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std::vector<SDOperand> CallResults;
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// If the call has results, copy the values out of the ret val registers.
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switch (N->getValueType(0)) {
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default: assert(0 && "Unexpected ret value!");
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case MVT::Other: break;
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case MVT::i1: {
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// bools are returned as bytes 0/1 in r8
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SDOperand byteval = CurDAG->getCopyFromReg(Chain, IA64::r8, MVT::i64,
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Chain.getValue(1));
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Chain = byteval.getValue(1);
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Chain = CurDAG->getTargetNode(IA64::CMPNE, MVT::i1, MVT::Other,
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byteval, CurDAG->getRegister(IA64::r0, MVT::i64)).getValue(1);
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CallResults.push_back(Chain.getValue(0));
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break;
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}
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case MVT::i64:
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Chain = CurDAG->getCopyFromReg(Chain, IA64::r8, MVT::i64,
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Chain.getValue(1)).getValue(1);
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CallResults.push_back(Chain.getValue(0));
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break;
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case MVT::f64:
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Chain = CurDAG->getCopyFromReg(Chain, IA64::F8, N->getValueType(0),
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Chain.getValue(1)).getValue(1);
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CallResults.push_back(Chain.getValue(0));
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break;
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}
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// restore GP, SP and RP - FIXME: this doesn't quite work (e.g.
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// methcall / objinst both segfault on exit) and it *really*
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// doesn't work unless you have -sched=none
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Chain = CurDAG->getCopyToReg(Chain, IA64::r1, GPBeforeCall);
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Chain = CurDAG->getCopyToReg(Chain, IA64::r12, SPBeforeCall);
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Chain = CurDAG->getCopyToReg(Chain, IA64::rp, RPBeforeCall);
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CallResults.push_back(Chain); // llc segfaults w/o this,
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// ary3(e.g.) SIGILLs with 3
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for (unsigned i = 0, e = CallResults.size(); i != e; ++i)
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CodeGenMap[Op.getValue(i)] = CallResults[i];
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return CallResults[Op.ResNo];
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}
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// Select - Convert the specified operand from a target-independent to a
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// target-specific node if it hasn't already been changed.
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SDOperand IA64DAGToDAGISel::Select(SDOperand Op) {
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@ -527,8 +341,37 @@ SDOperand IA64DAGToDAGISel::Select(SDOperand Op) {
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switch (N->getOpcode()) {
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default: break;
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case ISD::Register: return Op; // XXX: this is a hack, tblgen one day?
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case ISD::CALL:
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case ISD::TAILCALL: return SelectCALL(Op);
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case ISD::TAILCALL: { {
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// FIXME: This is a workaround for a bug in tblgen.
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// Pattern #47: (call:Flag (tglobaladdr:i32):$dst, ICC:Flag)
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// Emits: (CALL:void (tglobaladdr:i32):$dst)
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// Pattern complexity = 2 cost = 1
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SDOperand N1 = N->getOperand(1);
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if (N1.getOpcode() != ISD::TargetGlobalAddress &&
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N1.getOpcode() != ISD::ExternalSymbol) goto P47Fail;
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SDOperand InFlag = SDOperand(0, 0);
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SDOperand Chain = N->getOperand(0);
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SDOperand Tmp0 = N1;
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Chain = Select(Chain);
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SDOperand Result;
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if (N->getNumOperands() == 3) {
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InFlag = Select(N->getOperand(2));
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Result = CurDAG->getTargetNode(IA64::BRCALL, MVT::Other, MVT::Flag, Tmp0,
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Chain, InFlag);
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} else {
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Result = CurDAG->getTargetNode(IA64::BRCALL, MVT::Other, MVT::Flag, Tmp0,
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Chain);
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}
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Chain = CodeGenMap[SDOperand(N, 0)] = Result.getValue(0);
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CodeGenMap[SDOperand(N, 1)] = Result.getValue(1);
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return Result.getValue(Op.ResNo);
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}
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P47Fail:;
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}
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case ISD::FDIV:
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case ISD::SDIV:
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@ -601,7 +444,16 @@ SDOperand IA64DAGToDAGISel::Select(SDOperand Op) {
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CurDAG->getRegister(IA64::r1, MVT::i64), GA);
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return CurDAG->getTargetNode(IA64::LD8, MVT::i64, Tmp);
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}
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/* XXX case ISD::ExternalSymbol: {
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SDOperand EA = CurDAG->getTargetExternalSymbol(cast<ExternalSymbolSDNode>(N)->getSymbol(),
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MVT::i64);
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SDOperand Tmp = CurDAG->getTargetNode(IA64::ADDL_EA, MVT::i64,
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CurDAG->getRegister(IA64::r1, MVT::i64), EA);
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return CurDAG->getTargetNode(IA64::LD8, MVT::i64, Tmp);
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}
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*/
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case ISD::LOAD:
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case ISD::EXTLOAD:
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case ISD::ZEXTLOAD: {
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@ -615,10 +467,13 @@ SDOperand IA64DAGToDAGISel::Select(SDOperand Op) {
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default: N->dump(); assert(0 && "Cannot load this type!");
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case MVT::i1: { // this is a bool
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Opc = IA64::LD1; // first we load a byte, then compare for != 0
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return CurDAG->SelectNodeTo(N, IA64::CMPNE, MVT::i1, MVT::Other,
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if(N->getValueType(0) == MVT::i1) // XXX: early exit!
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return CurDAG->SelectNodeTo(N, IA64::CMPNE, MVT::i1, MVT::Other,
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CurDAG->getTargetNode(Opc, MVT::i64, Address),
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CurDAG->getRegister(IA64::r0, MVT::i64),
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Chain).getValue(Op.ResNo);
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/* otherwise, we want to load a bool into something bigger: LD1
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will do that for us, so we just fall through */
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}
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case MVT::i8: Opc = IA64::LD1; break;
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case MVT::i16: Opc = IA64::LD2; break;
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@ -690,6 +545,7 @@ SDOperand IA64DAGToDAGISel::Select(SDOperand Op) {
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case ISD::RET: {
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SDOperand Chain = Select(N->getOperand(0)); // Token chain.
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SDOperand InFlag;
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switch (N->getNumOperands()) {
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default:
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@ -707,11 +563,13 @@ SDOperand IA64DAGToDAGISel::Select(SDOperand Op) {
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// we mark r8 as live on exit up above in LowerArguments()
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// BuildMI(BB, IA64::MOV, 1, IA64::r8).addReg(Tmp1);
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Chain = CurDAG->getCopyToReg(Chain, IA64::r8, RetVal);
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InFlag = Chain.getValue(1);
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break;
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case MVT::f64:
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// we mark F8 as live on exit up above in LowerArguments()
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// BuildMI(BB, IA64::FMOV, 1, IA64::F8).addReg(Tmp1);
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Chain = CurDAG->getCopyToReg(Chain, IA64::F8, RetVal);
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InFlag = Chain.getValue(1);
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break;
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}
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break;
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