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Ignore <undef> uses when analyzing and rewriting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125226 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -64,8 +64,12 @@ bool SplitAnalysis::canAnalyzeBranch(const MachineBasicBlock *MBB) {
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/// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
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/// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
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void SplitAnalysis::analyzeUses() {
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void SplitAnalysis::analyzeUses() {
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg);
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for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg),
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MachineInstr *MI = I.skipInstruction();) {
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E = MRI.reg_end(); I != E; ++I) {
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MachineOperand &MO = I.getOperand();
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if (MO.isUse() && MO.isUndef())
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continue;
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MachineInstr *MI = MO.getParent();
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if (MI->isDebugValue() || !UsingInstrs.insert(MI))
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if (MI->isDebugValue() || !UsingInstrs.insert(MI))
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continue;
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continue;
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UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex());
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UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex());
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@ -918,6 +922,14 @@ void SplitEditor::rewriteAssigned() {
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MO.setReg(0);
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MO.setReg(0);
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continue;
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continue;
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}
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}
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// <undef> operands don't really read the register, so just assign them to
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// the complement.
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if (MO.isUse() && MO.isUndef()) {
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MO.setReg(Edit.get(0)->reg);
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continue;
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}
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SlotIndex Idx = LIS.getInstructionIndex(MI);
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SlotIndex Idx = LIS.getInstructionIndex(MI);
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Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
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Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
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