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https://github.com/c64scene-ar/llvm-6502.git
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generalize EmitDisplacementField to work with any size
and rename it to EmitImmediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95859 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -83,9 +83,9 @@ public:
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}
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}
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}
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}
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void EmitDisplacementField(const MCOperand &Disp, unsigned &CurByte,
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void EmitImmediate(const MCOperand &Disp, unsigned ImmSize,
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raw_ostream &OS,
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unsigned &CurByte, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups) const;
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SmallVectorImpl<MCFixup> &Fixups) const;
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inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
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inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
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unsigned RM) {
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unsigned RM) {
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@ -136,19 +136,18 @@ static bool isDisp8(int Value) {
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}
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}
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void X86MCCodeEmitter::
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void X86MCCodeEmitter::
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EmitDisplacementField(const MCOperand &DispOp,
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EmitImmediate(const MCOperand &DispOp, unsigned Size,
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unsigned &CurByte, raw_ostream &OS,
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unsigned &CurByte, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups) const {
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SmallVectorImpl<MCFixup> &Fixups) const {
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// If this is a simple integer displacement that doesn't require a relocation,
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// If this is a simple integer displacement that doesn't require a relocation,
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// emit it now.
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// emit it now.
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if (DispOp.isImm()) {
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if (DispOp.isImm()) {
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EmitConstant(DispOp.getImm(), 4, CurByte, OS);
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EmitConstant(DispOp.getImm(), Size, CurByte, OS);
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return;
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return;
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}
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}
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// FIXME: Pass in the relocation type.
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#if 0
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#if 0
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// Otherwise, this is something that requires a relocation. Emit it as such
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// now.
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unsigned RelocType = Is64BitMode ?
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unsigned RelocType = Is64BitMode ?
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(IsPCRel ? X86::reloc_pcrel_word : X86::reloc_absolute_word_sext)
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(IsPCRel ? X86::reloc_pcrel_word : X86::reloc_absolute_word_sext)
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: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
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: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
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@ -157,7 +156,7 @@ EmitDisplacementField(const MCOperand &DispOp,
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// Emit a symbolic constant as a fixup and 4 zeros.
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// Emit a symbolic constant as a fixup and 4 zeros.
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Fixups.push_back(MCFixup::Create(CurByte, DispOp.getExpr(),
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Fixups.push_back(MCFixup::Create(CurByte, DispOp.getExpr(),
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MCFixupKind(X86::reloc_absolute_word)));
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MCFixupKind(X86::reloc_absolute_word)));
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EmitConstant(0, 4, CurByte, OS);
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EmitConstant(0, Size, CurByte, OS);
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}
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}
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@ -187,7 +186,7 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
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if (BaseReg == 0 || // [disp32] in X86-32 mode
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if (BaseReg == 0 || // [disp32] in X86-32 mode
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BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
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BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
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EmitByte(ModRMByte(0, RegOpcodeField, 5), CurByte, OS);
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EmitByte(ModRMByte(0, RegOpcodeField, 5), CurByte, OS);
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EmitDisplacementField(Disp, CurByte, OS, Fixups);
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EmitImmediate(Disp, 4, CurByte, OS, Fixups);
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return;
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return;
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}
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}
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@ -211,7 +210,7 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
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// Otherwise, emit the most general non-SIB encoding: [REG+disp32]
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// Otherwise, emit the most general non-SIB encoding: [REG+disp32]
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EmitByte(ModRMByte(2, RegOpcodeField, BaseRegNo), CurByte, OS);
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EmitByte(ModRMByte(2, RegOpcodeField, BaseRegNo), CurByte, OS);
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EmitDisplacementField(Disp, CurByte, OS, Fixups);
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EmitImmediate(Disp, 4, CurByte, OS, Fixups);
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return;
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return;
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}
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}
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@ -266,9 +265,9 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
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// Do we need to output a displacement?
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// Do we need to output a displacement?
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if (ForceDisp8)
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if (ForceDisp8)
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EmitConstant(Disp.getImm(), 1, CurByte, OS);
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EmitImmediate(Disp, 1, CurByte, OS, Fixups);
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else if (ForceDisp32 || Disp.getImm() != 0)
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else if (ForceDisp32 || Disp.getImm() != 0)
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EmitDisplacementField(Disp, CurByte, OS, Fixups);
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EmitImmediate(Disp, 4, CurByte, OS, Fixups);
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}
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}
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/// DetermineREXPrefix - Determine if the MCInst has to be encoded with a X86-64
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/// DetermineREXPrefix - Determine if the MCInst has to be encoded with a X86-64
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