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[mips][mips64r6] Correct the encoding of dmuh, dmuhu, dmul, and dmulu.

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We have detected a documentation bug in the encoding tables of the released
MIPS64r6 specification that has resulted in the wrong encodings being used for
these instructions in LLVM. This commit corrects them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212330 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2014-07-04 10:08:27 +00:00
parent 2856d23b9c
commit a39d3ab819
3 changed files with 12 additions and 12 deletions
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8
lib/Target/Mips/Mips64r6InstrInfo.td
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@ -32,10 +32,10 @@ class DDIVU_ENC : SPECIAL_3R_FM<0b00010, 0b011111>;
class DLSA_R6_ENC : SPECIAL_LSA_FM<OPCODE6_DLSA>;
class DMOD_ENC : SPECIAL_3R_FM<0b00011, 0b011110>;
class DMODU_ENC : SPECIAL_3R_FM<0b00011, 0b011111>;
class DMUH_ENC : SPECIAL_3R_FM<0b00011, 0b111000>;
class DMUHU_ENC : SPECIAL_3R_FM<0b00011, 0b111001>;
class DMUL_R6_ENC : SPECIAL_3R_FM<0b00010, 0b111000>;
class DMULU_ENC : SPECIAL_3R_FM<0b00010, 0b111001>;
class DMUH_ENC : SPECIAL_3R_FM<0b00011, 0b011100>;
class DMUHU_ENC : SPECIAL_3R_FM<0b00011, 0b011101>;
class DMUL_R6_ENC : SPECIAL_3R_FM<0b00010, 0b011100>;
class DMULU_ENC : SPECIAL_3R_FM<0b00010, 0b011101>;
class LDPC_ENC : PCREL18_FM<OPCODE3_LDPC>;
class LLD_R6_ENC : SPECIAL3_LL_SC_FM<OPCODE6_LLD>;
class SCD_R6_ENC : SPECIAL3_LL_SC_FM<OPCODE6_SCD>;

8
test/MC/Disassembler/Mips/mips64r6.txt
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@ -103,10 +103,10 @@
0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4
0x00 0x64 0x10 0x99 # CHECK: mulu $2, $3, $4
0x00 0x64 0x10 0xd9 # CHECK: muhu $2, $3, $4
0x00 0x64 0x10 0xb8 # CHECK: dmul $2, $3, $4
0x00 0x64 0x10 0xf8 # CHECK: dmuh $2, $3, $4
0x00 0x64 0x10 0xb9 # CHECK: dmulu $2, $3, $4
0x00 0x64 0x10 0xf9 # CHECK: dmuhu $2, $3, $4
0x00 0x64 0x10 0x9c # CHECK: dmul $2, $3, $4
0x00 0x64 0x10 0xdc # CHECK: dmuh $2, $3, $4
0x00 0x64 0x10 0x9d # CHECK: dmulu $2, $3, $4
0x00 0x64 0x10 0xdd # CHECK: dmuhu $2, $3, $4
0x46 0x04 0x18 0x98 # CHECK: maddf.s $f2, $f3, $f4
0x46 0x24 0x18 0x98 # CHECK: maddf.d $f2, $f3, $f4
0x46 0x04 0x18 0x99 # CHECK: msubf.s $f2, $f3, $f4

8
test/MC/Mips/mips64r6/valid.s
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@ -120,10 +120,10 @@
muh $2,$3,$4 # CHECK: muh $2, $3, $4 # encoding: [0x00,0x64,0x10,0xd8]
mulu $2,$3,$4 # CHECK: mulu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x99]
muhu $2,$3,$4 # CHECK: muhu $2, $3, $4 # encoding: [0x00,0x64,0x10,0xd9]
dmul $2,$3,$4 # CHECK: dmul $2, $3, $4 # encoding: [0x00,0x64,0x10,0xb8]
dmuh $2,$3,$4 # CHECK: dmuh $2, $3, $4 # encoding: [0x00,0x64,0x10,0xf8]
dmulu $2,$3,$4 # CHECK: dmulu $2, $3, $4 # encoding: [0x00,0x64,0x10,0xb9]
dmuhu $2,$3,$4 # CHECK: dmuhu $2, $3, $4 # encoding: [0x00,0x64,0x10,0xf9]
dmul $2,$3,$4 # CHECK: dmul $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9c]
dmuh $2,$3,$4 # CHECK: dmuh $2, $3, $4 # encoding: [0x00,0x64,0x10,0xdc]
dmulu $2,$3,$4 # CHECK: dmulu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9d]
dmuhu $2,$3,$4 # CHECK: dmuhu $2, $3, $4 # encoding: [0x00,0x64,0x10,0xdd]
maddf.s $f2,$f3,$f4 # CHECK: maddf.s $f2, $f3, $f4 # encoding: [0x46,0x04,0x18,0x98]
maddf.d $f2,$f3,$f4 # CHECK: maddf.d $f2, $f3, $f4 # encoding: [0x46,0x24,0x18,0x98]
msubf.s $f2,$f3,$f4 # CHECK: msubf.s $f2, $f3, $f4 # encoding: [0x46,0x04,0x18,0x99]