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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 19:29:31 +00:00
Eliminate the printCallOperand method, using a 'call' modifier on
printOperand instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26025 91177308-0d34-0410-b5e6-96231b3b80d8
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04cadb3684
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a3b8c57b9e
@ -63,7 +63,9 @@ bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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return false;
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}
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void X86ATTAsmPrinter::printOp(const MachineOperand &MO, bool isCallOp) {
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void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
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const char *Modifier) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_VirtualRegister:
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@ -92,6 +94,7 @@ void X86ATTAsmPrinter::printOp(const MachineOperand &MO, bool isCallOp) {
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abort ();
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return;
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case MachineOperand::MO_GlobalAddress: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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// Darwin block shameless ripped from PowerPCAsmPrinter.cpp
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if (forDarwin) {
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if (!isCallOp) O << '$';
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@ -132,7 +135,8 @@ void X86ATTAsmPrinter::printOp(const MachineOperand &MO, bool isCallOp) {
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O << Offset;
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return;
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}
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case MachineOperand::MO_ExternalSymbol:
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case MachineOperand::MO_ExternalSymbol: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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if (isCallOp && forDarwin) {
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std::string Name(GlobalPrefix); Name += MO.getSymbolName();
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FnStubs.insert(Name);
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@ -142,6 +146,7 @@ void X86ATTAsmPrinter::printOp(const MachineOperand &MO, bool isCallOp) {
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if (!isCallOp) O << '$';
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O << GlobalPrefix << MO.getSymbolName();
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return;
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}
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default:
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O << "<unknown operand type>"; return;
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}
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@ -183,7 +188,7 @@ void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
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O << "+" << DispSpec.getImmedValue();
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if (IndexReg.getReg()) {
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O << "(,";
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printOp(IndexReg);
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printOperand(MI, Op+2);
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if (ScaleVal != 1)
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O << "," << ScaleVal;
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O << ")";
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@ -192,7 +197,7 @@ void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
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}
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if (DispSpec.isGlobalAddress()) {
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printOp(DispSpec, true);
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printOperand(MI, Op+3, "call");
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} else {
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int DispVal = DispSpec.getImmedValue();
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
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@ -202,11 +207,11 @@ void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
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if (IndexReg.getReg() || BaseReg.getReg()) {
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O << "(";
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if (BaseReg.getReg())
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printOp(BaseReg);
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printOperand(MI, Op);
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if (IndexReg.getReg()) {
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O << ",";
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printOp(IndexReg);
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printOperand(MI, Op+2);
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if (ScaleVal != 1)
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O << "," << ScaleVal;
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}
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@ -34,13 +34,9 @@ struct X86ATTAsmPrinter : public X86SharedAsmPrinter {
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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// This method is used by the tablegen'erated instruction printer.
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void printOperand(const MachineInstr *MI, unsigned OpNo){
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printOp(MI->getOperand(OpNo));
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}
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void printCallOperand(const MachineInstr *MI, unsigned OpNo) {
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printOp(MI->getOperand(OpNo), true); // Don't print '$' prefix.
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}
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// These methods are used by the tablegen'erated instruction printer.
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void printOperand(const MachineInstr *MI, unsigned OpNo,
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const char *Modifier = 0);
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void printi8mem(const MachineInstr *MI, unsigned OpNo) {
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printMemReference(MI, OpNo);
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}
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@ -64,7 +60,6 @@ struct X86ATTAsmPrinter : public X86SharedAsmPrinter {
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}
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool isCallOperand = false);
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void printSSECC(const MachineInstr *MI, unsigned Op);
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void printMemReference(const MachineInstr *MI, unsigned Op);
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bool runOnMachineFunction(MachineFunction &F);
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@ -159,10 +159,6 @@ def i16i8imm : Operand<i16>;
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// 32-bits but only 8 bits are significant.
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def i32i8imm : Operand<i32>;
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// PCRelative calls need special operand formatting.
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let PrintMethod = "printCallOperand" in
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def calltarget : Operand<i32>;
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// Branch targets have OtherVT type.
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def brtarget : Operand<OtherVT>;
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@ -516,7 +512,7 @@ let isCall = 1, noResults = 1 in
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// All calls clobber the non-callee saved registers...
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let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
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XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7] in {
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def CALLpcrel32 : I<0xE8, RawFrm, (ops calltarget:$dst), "call $dst",
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def CALLpcrel32 : I<0xE8, RawFrm, (ops i32imm:$dst), "call ${dst:call}",
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[]>;
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def CALL32r : I<0xFF, MRM2r, (ops R32:$dst), "call {*}$dst",
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[(X86call R32:$dst)]>;
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@ -526,7 +522,7 @@ let isCall = 1, noResults = 1 in
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// Tail call stuff.
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let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, noResults = 1 in
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def TAILJMPd : IBr<0xE9, (ops calltarget:$dst), "jmp $dst # TAIL CALL", []>;
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def TAILJMPd : IBr<0xE9, (ops i32imm:$dst), "jmp ${dst:call} # TAIL CALL", []>;
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let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, noResults = 1 in
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def TAILJMPr : I<0xFF, MRM4r, (ops R32:$dst), "jmp {*}$dst # TAIL CALL", []>;
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let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, noResults = 1 in
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@ -74,8 +74,8 @@ void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
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}
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}
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void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
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bool elideOffsetKeyword /* = false */) {
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void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
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const char *Modifier) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_VirtualRegister:
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@ -109,7 +109,7 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
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abort ();
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return;
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case MachineOperand::MO_GlobalAddress: {
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if (!elideOffsetKeyword)
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if (!Modifier || strcmp(Modifier, "call"))
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O << "OFFSET ";
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O << Mang->getValueName(MO.getGlobal());
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int Offset = MO.getOffset();
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@ -161,7 +161,7 @@ void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
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O << "[";
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bool NeedPlus = false;
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if (BaseReg.getReg()) {
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printOp(BaseReg, true);
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printOp(BaseReg, "call");
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NeedPlus = true;
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}
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@ -176,7 +176,7 @@ void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
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if (DispSpec.isGlobalAddress()) {
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if (NeedPlus)
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O << " + ";
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printOp(DispSpec, true);
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printOp(DispSpec, "call");
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} else {
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int DispVal = DispSpec.getImmedValue();
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if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
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@ -37,21 +37,18 @@ struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
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bool printInstruction(const MachineInstr *MI);
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// This method is used by the tablegen'erated instruction printer.
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void printOperand(const MachineInstr *MI, unsigned OpNo){
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void printOperand(const MachineInstr *MI, unsigned OpNo,
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const char *Modifier = 0) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.getType() == MachineOperand::MO_MachineRegister) {
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assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
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// Bug Workaround: See note in Printer::doInitialization about %.
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O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name;
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} else {
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printOp(MO);
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printOp(MO, Modifier);
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}
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}
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void printCallOperand(const MachineInstr *MI, unsigned OpNo) {
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printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET".
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}
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void printi8mem(const MachineInstr *MI, unsigned OpNo) {
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O << "BYTE PTR ";
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printMemReference(MI, OpNo);
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@ -82,7 +79,7 @@ struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
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}
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false);
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void printOp(const MachineOperand &MO, const char *Modifier = 0);
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void printSSECC(const MachineInstr *MI, unsigned Op);
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void printMemReference(const MachineInstr *MI, unsigned Op);
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bool runOnMachineFunction(MachineFunction &F);
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