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First patch in the direction of splitting MachineCodeEmitter in two subclasses:

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JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
2009-05-30 20:51:52 +00:00
parent 0e98e4d299
commit a3f99f9033
33 changed files with 1103 additions and 366 deletions
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72
lib/Target/Alpha/AlphaCodeEmitter.cpp
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@ -18,31 +18,50 @@
#include "Alpha.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Function.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
using namespace llvm;
namespace {
class AlphaCodeEmitter : public MachineFunctionPass {
const AlphaInstrInfo *II;
TargetMachine &TM;
MachineCodeEmitter &MCE;
class AlphaCodeEmitter {
MachineCodeEmitter &MCE;
public:
AlphaCodeEmitter( MachineCodeEmitter &mce) : MCE(mce) {}
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
unsigned getBinaryCodeForInstr(const MachineInstr &MI);
/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
///
unsigned getMachineOpValue(const MachineInstr &MI,
const MachineOperand &MO);
unsigned getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO);
};
template <class machineCodeEmitter>
class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
public AlphaCodeEmitter
{
const AlphaInstrInfo *II;
TargetMachine &TM;
machineCodeEmitter &MCE;
public:
static char ID;
explicit AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
: MachineFunctionPass(&ID), II(0), TM(tm), MCE(mce) {}
AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
explicit Emitter(TargetMachine &tm, machineCodeEmitter &mce)
: MachineFunctionPass(&ID), AlphaCodeEmitter( mce),
II(0), TM(tm), MCE(mce) {}
Emitter(TargetMachine &tm, machineCodeEmitter &mce,
const AlphaInstrInfo& ii)
: MachineFunctionPass(&ID), II(&ii), TM(tm), MCE(mce) {}
: MachineFunctionPass(&ID), AlphaCodeEmitter( mce),
II(&ii), TM(tm), MCE(mce) {}
bool runOnMachineFunction(MachineFunction &MF);
@ -52,27 +71,29 @@ namespace {
void emitInstruction(const MachineInstr &MI);
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
///
unsigned getBinaryCodeForInstr(const MachineInstr &MI);
private:
void emitBasicBlock(MachineBasicBlock &MBB);
};
char AlphaCodeEmitter::ID = 0;
template <class machineCodeEmitter>
char Emitter<machineCodeEmitter>::ID = 0;
}
/// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code
/// to the specified MCE object.
FunctionPass *llvm::createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
FunctionPass *llvm::createAlphaCodeEmitterPass( AlphaTargetMachine &TM,
MachineCodeEmitter &MCE) {
return new AlphaCodeEmitter(TM, MCE);
return new Emitter<MachineCodeEmitter>(TM, MCE);
}
bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
FunctionPass *llvm::createAlphaJITCodeEmitterPass( AlphaTargetMachine &TM,
JITCodeEmitter &JCE) {
return new Emitter<JITCodeEmitter>(TM, JCE);
}
template <class machineCodeEmitter>
bool Emitter<machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
II = ((AlphaTargetMachine&)MF.getTarget()).getInstrInfo();
do {
@ -84,7 +105,8 @@ bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
return false;
}
void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
template <class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
MCE.StartMachineBasicBlock(&MBB);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
I != E; ++I) {
@ -143,7 +165,7 @@ static unsigned getAlphaRegNumber(unsigned Reg) {
}
unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
const MachineOperand &MO) {
const MachineOperand &MO) {
unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
// or things that get fixed up later by the JIT.
@ -215,6 +237,6 @@ unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
return rv;
}
#include "AlphaGenCodeEmitter.inc"