From a3fbadfcd882f9f15bda7c1213b5ff52d6582a10 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Thu, 30 Sep 2010 19:53:58 +0000 Subject: [PATCH] Nuke a few more unused asm strings git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115193 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMAsmPrinter.cpp | 14 ++++++++------ lib/Target/ARM/ARMInstrInfo.td | 21 ++++++++++----------- lib/Target/ARM/ARMInstrThumb.td | 3 +-- 3 files changed, 19 insertions(+), 19 deletions(-) diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 10955fd5cd3..8ed2daed86d 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -696,7 +696,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { OutStreamer.EmitInstruction(AddInst); return; } - case ARM::PICADD: { // FIXME: Remove asm string from td file. + case ARM::PICADD: { // This is a pseudo op for a label + instruction sequence, which looks like: // LPC0: // add r0, pc, r0 @@ -767,7 +767,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { return; } - case ARM::CONSTPOOL_ENTRY: { // FIXME: Remove asm string from td file. + case ARM::CONSTPOOL_ENTRY: { /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool /// in the function. The first operand is the ID# for this instruction, the /// second is the index into the MachineConstantPool that this is, the third @@ -786,7 +786,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { return; } - case ARM::MOVi2pieces: { // FIXME: Remove asmstring from td file. + case ARM::MOVi2pieces: { + // FIXME: We'd like to remove the asm string in the .td file, but the // This is a hack that lowers as a two instruction sequence. unsigned DstReg = MI->getOperand(0).getReg(); unsigned ImmVal = (unsigned)MI->getOperand(1).getImm(); @@ -823,7 +824,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { } return; } - case ARM::MOVi32imm: { // FIXME: Remove asmstring from td file. + case ARM::MOVi32imm: { + // FIXME: We'd like to remove the asm string in the .td file, but the // This is a hack that lowers as a two instruction sequence. unsigned DstReg = MI->getOperand(0).getReg(); const MachineOperand &MO = MI->getOperand(1); @@ -924,7 +926,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { } case ARM::t2Int_eh_sjlj_setjmp: case ARM::t2Int_eh_sjlj_setjmp_nofp: - case ARM::tInt_eh_sjlj_setjmp: { // FIXME: Remove asmstring from td file. + case ARM::tInt_eh_sjlj_setjmp: { // Two incoming args: GPR:$src, GPR:$val // mov $val, pc // adds $val, #7 @@ -1008,7 +1010,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { } case ARM::Int_eh_sjlj_setjmp_nofp: - case ARM::Int_eh_sjlj_setjmp: { // FIXME: Remove asmstring from td file. + case ARM::Int_eh_sjlj_setjmp: { // Two incoming args: GPR:$src, GPR:$val // add $val, pc, #8 // str $val, [$src, #+4] diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 4db8790b4f6..b500d7447f4 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -688,8 +688,7 @@ multiclass AI1_adde_sube_s_irs opcod, string opc, PatFrag opnode, let neverHasSideEffects = 1, isNotDuplicable = 1 in def CONSTPOOL_ENTRY : PseudoInst<(outs), (ins cpinst_operand:$instid, cpinst_operand:$cpidx, - i32imm:$size), NoItinerary, - "${instid:label} ${cpidx:cpentry}", []>; + i32imm:$size), NoItinerary, "", []>; // FIXME: Marking these as hasSideEffects is necessary to prevent machine DCE // from removing one half of the matched pairs. That breaks PEI, which assumes @@ -845,41 +844,41 @@ def TRAP : AXI<(outs), (ins), MiscFrm, NoItinerary, // Address computation and loads and stores in PIC mode. let isNotDuplicable = 1 in { def PICADD : AXI1<0b0100, (outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p), - Pseudo, IIC_iALUr, "\n$cp:\n\tadd$p\t$dst, pc, $a", + Pseudo, IIC_iALUr, "", [(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>; let AddedComplexity = 10 in { def PICLDR : AXI2ldw<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_r, "\n${addr:label}:\n\tldr$p\t$dst, $addr", + Pseudo, IIC_iLoad_r, "", [(set GPR:$dst, (load addrmodepc:$addr))]>; def PICLDRH : AXI3ldh<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_bh_r, "\n${addr:label}:\n\tldrh${p}\t$dst, $addr", + Pseudo, IIC_iLoad_bh_r, "", [(set GPR:$dst, (zextloadi16 addrmodepc:$addr))]>; def PICLDRB : AXI2ldb<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_bh_r, "\n${addr:label}:\n\tldrb${p}\t$dst, $addr", + Pseudo, IIC_iLoad_bh_r, "", [(set GPR:$dst, (zextloadi8 addrmodepc:$addr))]>; def PICLDRSH : AXI3ldsh<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_bh_r, "\n${addr:label}:\n\tldrsh${p}\t$dst, $addr", + Pseudo, IIC_iLoad_bh_r, "", [(set GPR:$dst, (sextloadi16 addrmodepc:$addr))]>; def PICLDRSB : AXI3ldsb<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p), - Pseudo, IIC_iLoad_bh_r, "\n${addr:label}:\n\tldrsb${p}\t$dst, $addr", + Pseudo, IIC_iLoad_bh_r, "", [(set GPR:$dst, (sextloadi8 addrmodepc:$addr))]>; } let AddedComplexity = 10 in { def PICSTR : AXI2stw<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p), - Pseudo, IIC_iStore_r, "\n${addr:label}:\n\tstr$p\t$src, $addr", + Pseudo, IIC_iStore_r, "", [(store GPR:$src, addrmodepc:$addr)]>; def PICSTRH : AXI3sth<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p), - Pseudo, IIC_iStore_bh_r, "\n${addr:label}:\n\tstrh${p}\t$src, $addr", + Pseudo, IIC_iStore_bh_r, "", [(truncstorei16 GPR:$src, addrmodepc:$addr)]>; def PICSTRB : AXI2stb<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p), - Pseudo, IIC_iStore_bh_r, "\n${addr:label}:\n\tstrb${p}\t$src, $addr", + Pseudo, IIC_iStore_bh_r, "", [(truncstorei8 GPR:$src, addrmodepc:$addr)]>; } } // isNotDuplicable = 1 diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index f54672bee80..cb0b9d453d3 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -208,8 +208,7 @@ def tCPS : T1I<(outs), (ins cps_opt:$opt), NoItinerary, "cps$opt", // For both thumb1 and thumb2. let isNotDuplicable = 1 in -def tPICADD : TIt<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp), IIC_iALUr, - "\n$cp:\n\tadd\t$dst, pc", +def tPICADD : TIt<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp), IIC_iALUr, "", [(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>, T1Special<{0,0,?,?}> { let Inst{6-3} = 0b1111; // A8.6.6 Rm = pc