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Document the fact that the selection dag changes the vselect condition type

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148411 91177308-0d34-0410-b5e6-96231b3b80d8
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Nadav Rotem 2012-01-18 20:50:30 +00:00
parent bfab85e9b1
commit a402271351
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include/llvm/CodeGen/ISDOpcodes.h
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@ -323,6 +323,9 @@ namespace ISD {
// and #2), returning a vector result. All vectors have the same length.
// Much like the scalar select and setcc, each bit in the condition selects
// whether the corresponding result element is taken from op #1 or op #2.
// At first, the VSELECT condition is of vXi1 type. Later, targets may change
// the condition type in order to match the VSELECT node using a a pattern.
// The condition follows the BooleanContent format of the target.
VSELECT,
// Select with condition operator - This selects between a true value and