From a4161ee99478e7f8f9e33481e1c0dc79f0b4bd7d Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 30 Dec 2007 00:12:25 +0000 Subject: [PATCH] simplify some code by factoring operand construction better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45428 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/MachineInstr.h | 50 +++++++++++++---------------- lib/CodeGen/MachineInstr.cpp | 26 +++------------ 2 files changed, 27 insertions(+), 49 deletions(-) diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index b50f18bb592..7aed410bb4b 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -98,10 +98,6 @@ public: MachineOperand Op; Op.opType = MachineOperand::MO_Immediate; Op.contents.immedVal = Val; - Op.IsDef = false; - Op.IsImp = false; - Op.IsKill = false; - Op.IsDead = false; Op.auxInfo.offset = 0; return Op; } @@ -110,14 +106,24 @@ public: MachineOperand Op; Op.opType = MachineOperand::MO_FrameIndex; Op.contents.immedVal = Idx; - Op.IsDef = false; - Op.IsImp = false; - Op.IsKill = false; - Op.IsDead = false; Op.auxInfo.offset = 0; return Op; } - + + static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false, + bool isKill = false, bool isDead = false, + unsigned SubReg = 0) { + MachineOperand Op; + Op.opType = MachineOperand::MO_Register; + Op.IsDef = isDef; + Op.IsImp = isImp; + Op.IsKill = isKill; + Op.IsDead = isDead; + Op.contents.RegNo = Reg; + Op.auxInfo.subReg = SubReg; + return Op; + } + const MachineOperand &operator=(const MachineOperand &MO) { contents = MO.contents; IsDef = MO.IsDef; @@ -341,7 +347,6 @@ class MachineInstr { void operator=(const MachineInstr&); // DO NOT IMPLEMENT // Intrusive list support - // friend struct ilist_traits; public: @@ -350,7 +355,7 @@ public: MachineInstr(); /// MachineInstr ctor - This constructor create a MachineInstr and add the - /// implicit operands. It reserves space for number of operands specified by + /// implicit operands. It reserves space for number of operands specified by /// TargetInstrDescriptor. explicit MachineInstr(const TargetInstrDescriptor &TID, bool NoImp = false); @@ -465,24 +470,17 @@ public: void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false, bool IsKill = false, bool IsDead = false, unsigned SubReg = 0) { - MachineOperand &Op = AddNewOperand(IsImp); - Op.opType = MachineOperand::MO_Register; - Op.IsDef = IsDef; - Op.IsImp = IsImp; - Op.IsKill = IsKill; - Op.IsDead = IsDead; - Op.contents.RegNo = Reg; - Op.auxInfo.subReg = (unsigned char)SubReg; + // FIXME: Make the AddNewOperand api sane. + AddNewOperand(IsImp) = MachineOperand::CreateReg(Reg, IsDef, IsImp, IsKill, + IsDead, SubReg); } /// addImmOperand - Add a zero extended constant argument to the /// machine instruction. /// void addImmOperand(int64_t Val) { - MachineOperand &Op = AddNewOperand(); - Op.opType = MachineOperand::MO_Immediate; - Op.contents.immedVal = Val; - Op.auxInfo.offset = 0; + // FIXME: Make the AddNewOperand api sane. + AddNewOperand() = MachineOperand::CreateImm(Val); } void addMachineBasicBlockOperand(MachineBasicBlock *MBB) { @@ -495,10 +493,8 @@ public: /// addFrameIndexOperand - Add an abstract frame index to the instruction /// void addFrameIndexOperand(unsigned Idx) { - MachineOperand &Op = AddNewOperand(); - Op.opType = MachineOperand::MO_FrameIndex; - Op.contents.immedVal = Idx; - Op.auxInfo.offset = 0; + // FIXME: Make the AddNewOperand api sane. + AddNewOperand() = MachineOperand::CreateFrameIndex(Idx); } /// addConstantPoolndexOperand - Add a constant pool object index to the diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index dd89e3649db..1655cbabf28 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -31,29 +31,11 @@ MachineInstr::MachineInstr() void MachineInstr::addImplicitDefUseOperands() { if (TID->ImplicitDefs) - for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) { - MachineOperand Op; - Op.opType = MachineOperand::MO_Register; - Op.IsDef = true; - Op.IsImp = true; - Op.IsKill = false; - Op.IsDead = false; - Op.contents.RegNo = *ImpDefs; - Op.auxInfo.subReg = 0; - Operands.push_back(Op); - } + for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) + addRegOperand(*ImpDefs, true, true); if (TID->ImplicitUses) - for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) { - MachineOperand Op; - Op.opType = MachineOperand::MO_Register; - Op.IsDef = false; - Op.IsImp = true; - Op.IsKill = false; - Op.IsDead = false; - Op.contents.RegNo = *ImpUses; - Op.auxInfo.subReg = 0; - Operands.push_back(Op); - } + for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) + addRegOperand(*ImpUses, false, true); } /// MachineInstr ctor - This constructor create a MachineInstr and add the