mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-21 00:32:23 +00:00
Allow libcalls for i16 sdiv/udiv/rem operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72941 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
5d41910396
commit
a43a7aefd7
@ -1746,7 +1746,9 @@ void DAGTypeLegalizer::ExpandIntRes_SDIV(SDNode *N,
|
||||
DebugLoc dl = N->getDebugLoc();
|
||||
|
||||
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
|
||||
if (VT == MVT::i32)
|
||||
if (VT == MVT::i16)
|
||||
LC = RTLIB::SDIV_I16;
|
||||
else if (VT == MVT::i32)
|
||||
LC = RTLIB::SDIV_I32;
|
||||
else if (VT == MVT::i64)
|
||||
LC = RTLIB::SDIV_I64;
|
||||
@ -1908,7 +1910,9 @@ void DAGTypeLegalizer::ExpandIntRes_SREM(SDNode *N,
|
||||
DebugLoc dl = N->getDebugLoc();
|
||||
|
||||
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
|
||||
if (VT == MVT::i32)
|
||||
if (VT == MVT::i16)
|
||||
LC = RTLIB::SREM_I16;
|
||||
else if (VT == MVT::i32)
|
||||
LC = RTLIB::SREM_I32;
|
||||
else if (VT == MVT::i64)
|
||||
LC = RTLIB::SREM_I64;
|
||||
@ -1937,7 +1941,9 @@ void DAGTypeLegalizer::ExpandIntRes_UDIV(SDNode *N,
|
||||
DebugLoc dl = N->getDebugLoc();
|
||||
|
||||
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
|
||||
if (VT == MVT::i32)
|
||||
if (VT == MVT::i16)
|
||||
LC = RTLIB::UDIV_I16;
|
||||
else if (VT == MVT::i32)
|
||||
LC = RTLIB::UDIV_I32;
|
||||
else if (VT == MVT::i64)
|
||||
LC = RTLIB::UDIV_I64;
|
||||
@ -1955,7 +1961,9 @@ void DAGTypeLegalizer::ExpandIntRes_UREM(SDNode *N,
|
||||
DebugLoc dl = N->getDebugLoc();
|
||||
|
||||
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
|
||||
if (VT == MVT::i32)
|
||||
if (VT == MVT::i16)
|
||||
LC = RTLIB::UREM_I16;
|
||||
else if (VT == MVT::i32)
|
||||
LC = RTLIB::UREM_I32;
|
||||
else if (VT == MVT::i64)
|
||||
LC = RTLIB::UREM_I64;
|
||||
|
Loading…
Reference in New Issue
Block a user