From a44a751bc921a72de15562091219693e8d4ae7b7 Mon Sep 17 00:00:00 2001 From: Richard Osborne Date: Sun, 16 Dec 2012 16:46:24 +0000 Subject: [PATCH] Set instruction size correctly in XCoreInstrFormats.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170289 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/XCore/XCoreInstrFormats.td | 41 ++++++++++++++------------- 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/lib/Target/XCore/XCoreInstrFormats.td b/lib/Target/XCore/XCoreInstrFormats.td index 1963a70fb30..5eb4ff1d7f9 100644 --- a/lib/Target/XCore/XCoreInstrFormats.td +++ b/lib/Target/XCore/XCoreInstrFormats.td @@ -10,7 +10,7 @@ //===----------------------------------------------------------------------===// // Instruction format superclass //===----------------------------------------------------------------------===// -class InstXCore pattern> +class InstXCore pattern> : Instruction { field bits<32> Inst; @@ -19,102 +19,103 @@ class InstXCore pattern> dag InOperandList = ins; let AsmString = asmstr; let Pattern = pattern; + let Size = sz; } // XCore pseudo instructions format class PseudoInstXCore pattern> - : InstXCore; + : InstXCore<0, outs, ins, asmstr, pattern>; //===----------------------------------------------------------------------===// // Instruction formats //===----------------------------------------------------------------------===// class _F3R pattern> - : InstXCore { + : InstXCore<2, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FL3R pattern> - : InstXCore { + : InstXCore<4, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _F2RUS pattern> - : InstXCore { + : InstXCore<2, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FL2RUS pattern> - : InstXCore { + : InstXCore<4, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FRU6 pattern> - : InstXCore { + : InstXCore<2, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FLRU6 pattern> - : InstXCore { + : InstXCore<4, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FU6 pattern> - : InstXCore { + : InstXCore<2, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FLU6 pattern> - : InstXCore { + : InstXCore<4, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FU10 pattern> - : InstXCore { + : InstXCore<2, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FLU10 pattern> - : InstXCore { + : InstXCore<4, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _F2R pattern> - : InstXCore { + : InstXCore<2, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FRUS pattern> - : InstXCore { + : InstXCore<2, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _FL2R pattern> - : InstXCore { + : InstXCore<4, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _F1R pattern> - : InstXCore { + : InstXCore<2, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _F0R pattern> - : InstXCore { + : InstXCore<2, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _L4R pattern> - : InstXCore { + : InstXCore<4, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _L5R pattern> - : InstXCore { + : InstXCore<4, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; } class _L6R pattern> - : InstXCore { + : InstXCore<4, outs, ins, asmstr, pattern> { let Inst{31-0} = 0; }