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Tighten up some checks. Fix FPOWI splitting for

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non-power-of-two vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53558 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2008-07-14 17:33:37 +00:00
parent 46868c07bb
commit a489be59ef
1 changed files with 3 additions and 3 deletions
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6
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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@ -430,7 +430,7 @@ void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDOperand &Lo,
void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDOperand &Lo,
SDOperand &Hi) {
// FIXME: Handle non-power-of-two vectors?
assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
unsigned NumSubvectors = N->getNumOperands() / 2;
if (NumSubvectors == 1) {
Lo = N->getOperand(0);
@ -530,7 +530,7 @@ void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDOperand &Lo,
SDOperand &Hi) {
GetSplitVector(N->getOperand(0), Lo, Hi);
Lo = DAG.getNode(ISD::FPOWI, Lo.getValueType(), Lo, N->getOperand(1));
Hi = DAG.getNode(ISD::FPOWI, Lo.getValueType(), Hi, N->getOperand(1));
Hi = DAG.getNode(ISD::FPOWI, Hi.getValueType(), Hi, N->getOperand(1));
}
@ -588,7 +588,7 @@ bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
}
SDOperand DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
assert(ISD::isNormalStore(N) && "Truncating store of vector?");
assert(OpNo == 1 && "Can only split the stored value");
SDOperand Ch = N->getChain();