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InstCombine: Correctly propagate NSW/NUW for x-(-A) -> x+A
We can only propagate the nsw bits if both subtraction instructions are marked with the appropriate bit. N.B. We only propagate the nsw bit in InstCombine because the nuw case is already handled in InstSimplify. This fixes PR20189. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214385 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1462,11 +1462,17 @@ Instruction *InstCombiner::visitSub(BinaryOperator &I) {
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if (Value *V = SimplifyUsingDistributiveLaws(I))
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if (Value *V = SimplifyUsingDistributiveLaws(I))
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return ReplaceInstUsesWith(I, V);
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return ReplaceInstUsesWith(I, V);
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// If this is a 'B = x-(-A)', change to B = x+A. This preserves NSW/NUW.
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// If this is a 'B = x-(-A)', change to B = x+A.
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if (Value *V = dyn_castNegVal(Op1)) {
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if (Value *V = dyn_castNegVal(Op1)) {
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BinaryOperator *Res = BinaryOperator::CreateAdd(Op0, V);
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BinaryOperator *Res = BinaryOperator::CreateAdd(Op0, V);
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Res->setHasNoSignedWrap(I.hasNoSignedWrap());
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Res->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
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if (const auto *BO = dyn_cast<BinaryOperator>(Op1)) {
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assert(BO->getOpcode() == Instruction::Sub &&
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"Expected a subtraction operator!");
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if (BO->hasNoSignedWrap() && I.hasNoSignedWrap())
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Res->setHasNoSignedWrap(true);
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}
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return Res;
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return Res;
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}
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}
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@ -464,3 +464,12 @@ define i32 @test38(i32 %A) {
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; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[ICMP]] to i32
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; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[ICMP]] to i32
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; CHECK-NEXT: ret i32 [[SEXT]]
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; CHECK-NEXT: ret i32 [[SEXT]]
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}
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}
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define i32 @test39(i32 %A, i32 %x) {
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%B = sub i32 0, %A
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%C = sub nsw i32 %x, %B
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ret i32 %C
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; CHECK-LABEL: @test39(
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; CHECK: %C = add i32 %x, %A
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; CHECK: ret i32 %C
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}
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