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Remove dead code.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45496 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling
2008-01-02 20:47:37 +00:00
parent e2620add35
commit a4b662272d
1 changed files with 0 additions and 35 deletions
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35
lib/CodeGen/MachineLICM.cpp
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@@ -56,9 +56,6 @@ namespace {
// State that is updated as we process loops // State that is updated as we process loops
bool Changed; // True if a loop is changed. bool Changed; // True if a loop is changed.
MachineLoop *CurLoop; // The current loop we are working on. MachineLoop *CurLoop; // The current loop we are working on.
// Map the def of a virtual register to the machine instruction.
IndexedMap<const MachineInstr*, VirtReg2IndexFunctor> VRegDefs;
public: public:
static char ID; // Pass identification, replacement for typeid static char ID; // Pass identification, replacement for typeid
MachineLICM() : MachineFunctionPass((intptr_t)&ID) {} MachineLICM() : MachineFunctionPass((intptr_t)&ID) {}
@@ -92,11 +89,6 @@ namespace {
HoistRegion(DT->getNode(L->getHeader())); HoistRegion(DT->getNode(L->getHeader()));
} }
/// MapVirtualRegisterDefs - Create a map of which machine instruction
/// defines a virtual register.
///
void MapVirtualRegisterDefs();
/// IsInSubLoop - A little predicate that returns true if the specified /// IsInSubLoop - A little predicate that returns true if the specified
/// basic block is in a subloop of the current one, not the current one /// basic block is in a subloop of the current one, not the current one
/// itself. /// itself.
@@ -192,8 +184,6 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
LI = &getAnalysis<MachineLoopInfo>(); LI = &getAnalysis<MachineLoopInfo>();
DT = &getAnalysis<MachineDominatorTree>(); DT = &getAnalysis<MachineDominatorTree>();
MapVirtualRegisterDefs();
for (MachineLoopInfo::iterator for (MachineLoopInfo::iterator
I = LI->begin(), E = LI->end(); I != E; ++I) { I = LI->begin(), E = LI->end(); I != E; ++I) {
CurLoop = *I; CurLoop = *I;
@@ -208,31 +198,6 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
return Changed; return Changed;
} }
/// MapVirtualRegisterDefs - Create a map of which machine instruction defines a
/// virtual register.
///
void MachineLICM::MapVirtualRegisterDefs() {
for (MachineFunction::const_iterator
I = CurMF->begin(), E = CurMF->end(); I != E; ++I) {
const MachineBasicBlock &MBB = *I;
for (MachineBasicBlock::const_iterator
II = MBB.begin(), IE = MBB.end(); II != IE; ++II) {
const MachineInstr &MI = *II;
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI.getOperand(i);
if (MO.isRegister() && MO.isDef() &&
MRegisterInfo::isVirtualRegister(MO.getReg())) {
VRegDefs.grow(MO.getReg());
VRegDefs[MO.getReg()] = &MI;
}
}
}
}
}
/// HoistRegion - Walk the specified region of the CFG (defined by all blocks /// HoistRegion - Walk the specified region of the CFG (defined by all blocks
/// dominated by the specified block, and that are in the current loop) in depth /// dominated by the specified block, and that are in the current loop) in depth
/// first order w.r.t the DominatorTree. This allows us to visit definitions /// first order w.r.t the DominatorTree. This allows us to visit definitions