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There are a few places where subtarget features are still

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represented by uint64_t, this patch replaces these
usages with the FeatureBitset (std::bitset) type.

Differential Revision: http://reviews.llvm.org/D10542


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241058 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ranjeet Singh
2015-06-30 11:30:42 +00:00
parent 427ea8e18a
commit a5106ca54d
11 changed files with 127 additions and 101 deletions
Download Patch File Download Diff File Expand all files Collapse all files

52
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@@ -281,7 +281,7 @@ class ARMAsmParser : public MCTargetAsmParser {
}
void SwitchMode() {
uint64_t FB = ComputeAvailableFeatures(STI.ToggleFeature(ARM::ModeThumb));
FeatureBitset FB = ComputeAvailableFeatures(STI.ToggleFeature(ARM::ModeThumb));
setAvailableFeatures(FB);
}
bool isMClass() const {
@@ -375,6 +375,7 @@ public:
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
OperandVector &Operands, MCStreamer &Out,
uint64_t &ErrorInfo,
FeatureBitset &ErrorMissingFeature,
bool MatchingInlineAsm) override;
void onLabelParsed(MCSymbol *Symbol) override;
};
@@ -5623,7 +5624,7 @@ static bool isDataTypeToken(StringRef Tok) {
static bool doesIgnoreDataTypeSuffix(StringRef Mnemonic, StringRef DT) {
return Mnemonic.startswith("vldm") || Mnemonic.startswith("vstm");
}
static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features,
static void applyMnemonicAliases(StringRef &Mnemonic, FeatureBitset Features,
unsigned VariantID);
static bool RequiresVFPRegListValidation(StringRef Inst,
@@ -5662,7 +5663,7 @@ bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
// The generic tblgen'erated code does this later, at the start of
// MatchInstructionImpl(), but that's too late for aliases that include
// any sort of suffix.
uint64_t AvailableFeatures = getAvailableFeatures();
FeatureBitset AvailableFeatures = getAvailableFeatures();
unsigned AssemblerDialect = getParser().getAssemblerDialect();
applyMnemonicAliases(Name, AvailableFeatures, AssemblerDialect);
@@ -8573,16 +8574,17 @@ template <> inline bool IsCPSRDead<MCInst>(MCInst *Instr) {
}
}
static const char *getSubtargetFeatureName(uint64_t Val);
static const char *getSubtargetFeatureName(uint64_t Feature);
bool ARMAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
OperandVector &Operands,
MCStreamer &Out, uint64_t &ErrorInfo,
FeatureBitset &ErrorMissingFeature,
bool MatchingInlineAsm) {
MCInst Inst;
unsigned MatchResult;
MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
MatchingInlineAsm);
ErrorMissingFeature, MatchingInlineAsm);
switch (MatchResult) {
case Match_Success:
// Context sensitive operand constraints aren't handled by the matcher,
@@ -8625,17 +8627,15 @@ bool ARMAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
Out.EmitInstruction(Inst, STI);
return false;
case Match_MissingFeature: {
assert(ErrorInfo && "Unknown missing feature!");
assert(ErrorMissingFeature.any() && "Unknown missing feature!");
// Special case the error message for the very common case where only
// a single subtarget feature is missing (Thumb vs. ARM, e.g.).
std::string Msg = "instruction requires:";
uint64_t Mask = 1;
for (unsigned i = 0; i < (sizeof(ErrorInfo)*8-1); ++i) {
if (ErrorInfo & Mask) {
for (unsigned i = 0; i < ErrorMissingFeature.size(); ++i) {
if (ErrorMissingFeature[i]) {
Msg += " ";
Msg += getSubtargetFeatureName(ErrorInfo & Mask);
Msg += getSubtargetFeatureName(i);
}
Mask <<= 1;
}
return Error(IDLoc, Msg);
}
@@ -9916,27 +9916,27 @@ extern "C" void LLVMInitializeARMAsmParser() {
// flags below, that were generated by table-gen.
static const struct {
const ARM::ArchExtKind Kind;
const unsigned ArchCheck;
const FeatureBitset ArchCheck;
const FeatureBitset Features;
} Extensions[] = {
{ ARM::AEK_CRC, Feature_HasV8, {ARM::FeatureCRC} },
{ ARM::AEK_CRYPTO, Feature_HasV8,
{ ARM::AEK_CRC, {Feature_HasV8}, {ARM::FeatureCRC} },
{ ARM::AEK_CRYPTO, {Feature_HasV8},
{ARM::FeatureCrypto, ARM::FeatureNEON, ARM::FeatureFPARMv8} },
{ ARM::AEK_FP, Feature_HasV8, {ARM::FeatureFPARMv8} },
{ ARM::AEK_HWDIV, Feature_HasV7 | Feature_IsNotMClass,
{ ARM::AEK_FP, {Feature_HasV8}, {ARM::FeatureFPARMv8} },
{ ARM::AEK_HWDIV, {Feature_HasV7, Feature_IsNotMClass},
{ARM::FeatureHWDiv, ARM::FeatureHWDivARM} },
{ ARM::AEK_MP, Feature_HasV7 | Feature_IsNotMClass, {ARM::FeatureMP} },
{ ARM::AEK_SIMD, Feature_HasV8, {ARM::FeatureNEON, ARM::FeatureFPARMv8} },
{ ARM::AEK_MP, {Feature_HasV7 , Feature_IsNotMClass}, {ARM::FeatureMP} },
{ ARM::AEK_SIMD, {Feature_HasV8}, {ARM::FeatureNEON, ARM::FeatureFPARMv8} },
// FIXME: Also available in ARMv6-K
{ ARM::AEK_SEC, Feature_HasV7, {ARM::FeatureTrustZone} },
{ ARM::AEK_SEC, {Feature_HasV7}, {ARM::FeatureTrustZone} },
// FIXME: Only available in A-class, isel not predicated
{ ARM::AEK_VIRT, Feature_HasV7, {ARM::FeatureVirtualization} },
{ ARM::AEK_VIRT, {Feature_HasV7}, {ARM::FeatureVirtualization} },
// FIXME: Unsupported extensions.
{ ARM::AEK_OS, Feature_None, {} },
{ ARM::AEK_IWMMXT, Feature_None, {} },
{ ARM::AEK_IWMMXT2, Feature_None, {} },
{ ARM::AEK_MAVERICK, Feature_None, {} },
{ ARM::AEK_XSCALE, Feature_None, {} },
{ ARM::AEK_OS, {Feature_None}, {} },
{ ARM::AEK_IWMMXT, {Feature_None}, {} },
{ ARM::AEK_IWMMXT2, {Feature_None}, {} },
{ ARM::AEK_MAVERICK, {Feature_None}, {} },
{ ARM::AEK_XSCALE, {Feature_None}, {} },
};
/// parseDirectiveArchExtension
@@ -9980,7 +9980,7 @@ bool ARMAsmParser::parseDirectiveArchExtension(SMLoc L) {
? (~STI.getFeatureBits() & Extension.Features)
: ( STI.getFeatureBits() & Extension.Features);
uint64_t Features =
FeatureBitset Features =
ComputeAvailableFeatures(STI.ToggleFeature(ToggleFeatures));
setAvailableFeatures(Features);
return false;