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Fix encoding of existing shift instructions, add rr shifts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12739 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -83,9 +83,12 @@ def XORrr : F3_1<2, 0b000011, "xor">;
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def XORri : F3_2<2, 0b000011, "xor">;
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// Section B.12 - Shift Instructions, p. 107
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def SLLri : F3_1<2, 0b100101, "sll">;
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def SRLri : F3_1<2, 0b100110, "srl">;
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def SRAri : F3_1<2, 0b100111, "sra">;
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def SLLrr : F3_1<2, 0b100101, "sll">;
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def SLLri : F3_2<2, 0b100101, "sll">;
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def SRLrr : F3_1<2, 0b100110, "srl">;
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def SRLri : F3_2<2, 0b100110, "srl">;
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def SRArr : F3_1<2, 0b100111, "sra">;
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def SRAri : F3_2<2, 0b100111, "sra">;
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// Section B.13 - Add Instructions, p. 108
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def ADDrr : F3_1<2, 0b000000, "add">;
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@ -83,9 +83,12 @@ def XORrr : F3_1<2, 0b000011, "xor">;
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def XORri : F3_2<2, 0b000011, "xor">;
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// Section B.12 - Shift Instructions, p. 107
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def SLLri : F3_1<2, 0b100101, "sll">;
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def SRLri : F3_1<2, 0b100110, "srl">;
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def SRAri : F3_1<2, 0b100111, "sra">;
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def SLLrr : F3_1<2, 0b100101, "sll">;
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def SLLri : F3_2<2, 0b100101, "sll">;
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def SRLrr : F3_1<2, 0b100110, "srl">;
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def SRLri : F3_2<2, 0b100110, "srl">;
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def SRArr : F3_1<2, 0b100111, "sra">;
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def SRAri : F3_2<2, 0b100111, "sra">;
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// Section B.13 - Add Instructions, p. 108
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def ADDrr : F3_1<2, 0b000000, "add">;
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