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- Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests and
bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg
around.
- Relax register scavenging to allow use of partially "not-live" registers. It's
common for targets to operate on registers where the top bits are undef. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
= d0
When the insert_subreg is eliminated by the coalescer, the scavenger used to
complain. The previous fix was to keep to insert_subreg around. But that's
brittle and it's overly conservative when we want to use the scavenger to
allocate registers. It's actually legal and desirable for other instructions
to use the "undef" part of d0. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
s1 =
= s1
= d0
We probably need add a "partial-undef" marker on machine operand so the
machine verifier would not complain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85091 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
parent
85def16079
commit
a5dc45e3c8
@ -145,30 +145,20 @@ public:
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/// isIdentityCopy - Return true if the instruction is a copy (or
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/// extract_subreg, insert_subreg, subreg_to_reg) where the source and
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/// destination registers are the same.
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bool isIdentityCopy(const MachineInstr &MI,
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unsigned &SrcReg, unsigned &DstReg,
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unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
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bool isIdentityCopy(const MachineInstr &MI) const {
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unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
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if (isMoveInstr(MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
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SrcReg == DstReg)
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return true;
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if (MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) {
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DstReg = MI.getOperand(0).getReg();
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DstSubIdx = MI.getOperand(0).getSubReg();
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SrcReg = MI.getOperand(1).getReg();
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SrcSubIdx = MI.getOperand(1).getSubReg();
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return DstReg == SrcReg;
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}
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if (MI.getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
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MI.getOpcode() == TargetInstrInfo::SUBREG_TO_REG) {
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DstReg = MI.getOperand(0).getReg();
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DstSubIdx = MI.getOperand(0).getSubReg();
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SrcReg = MI.getOperand(2).getReg();
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SrcSubIdx = MI.getOperand(2).getSubReg();
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return DstReg == SrcReg;
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}
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if (MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG &&
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MI.getOperand(0).getReg() == MI.getOperand(1).getReg())
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return true;
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if ((MI.getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
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MI.getOpcode() == TargetInstrInfo::SUBREG_TO_REG) &&
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MI.getOperand(0).getReg() == MI.getOperand(2).getReg())
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return true;
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return false;
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}
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@ -177,7 +177,24 @@ void RegScavenger::forward() {
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if (!Reg || isReserved(Reg))
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continue;
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if (MO.isUse()) {
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assert(isUsed(Reg) && "Using an undefined register!");
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if (!isUsed(Reg)) {
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// Check if it's partial live: e.g.
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// D0 = insert_subreg D0<undef>, S0
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// ... D0
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// The problem is the insert_subreg could be eliminated. The use of
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// D0 is using a partially undef value. This is not *incorrect* since
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// S1 is can be freely clobbered.
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// Ideally we would like a way to model this, but leaving the
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// insert_subreg around causes both correctness and performance issues.
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bool SubUsed = false;
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for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
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unsigned SubReg = *SubRegs; ++SubRegs)
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if (isUsed(SubReg)) {
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SubUsed = true;
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break;
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}
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assert(SubUsed && "Using an undefined register!");
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}
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assert((!EarlyClobberRegs.test(Reg) || MI->isRegTiedToDefOperand(i)) &&
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"Using an early clobbered register!");
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} else {
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@ -1853,7 +1853,7 @@ bool SimpleRegisterCoalescing::RangeIsDefinedByCopyFromReg(LiveInterval &li,
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tii_->isMoveInstr(*DefMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
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DstReg == li.reg && SrcReg == Reg) {
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// Cache computed info.
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LR->valno->def = LR->start;
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LR->valno->def = LR->start;
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LR->valno->setCopy(DefMI);
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return true;
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}
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@ -2006,7 +2006,7 @@ bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval &RHS){
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// RHS into, update the value number info for the LHS to indicate that the
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// value number is defined where the RHS value number was.
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const VNInfo *VNI = RHS.getValNumInfo(0);
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LHSValNo->def = VNI->def;
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LHSValNo->def = VNI->def;
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LHSValNo->setCopy(VNI->getCopy());
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// Okay, the final step is to loop over the RHS live intervals, adding them to
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@ -2489,7 +2489,8 @@ SimpleRegisterCoalescing::lastRegisterUse(LiveIndex Start,
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MachineOperand &Use = I.getOperand();
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MachineInstr *UseMI = Use.getParent();
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unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
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if (tii_->isIdentityCopy(*UseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
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if (tii_->isMoveInstr(*UseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
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SrcReg == DstReg)
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// Ignore identity copies.
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continue;
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LiveIndex Idx = li_->getInstructionIndex(UseMI);
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@ -2515,7 +2516,8 @@ SimpleRegisterCoalescing::lastRegisterUse(LiveIndex Start,
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// Ignore identity copies.
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unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
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if (!tii_->isIdentityCopy(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
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if (!(tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
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SrcReg == DstReg))
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for (unsigned i = 0, NumOps = MI->getNumOperands(); i != NumOps; ++i) {
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MachineOperand &Use = MI->getOperand(i);
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if (Use.isReg() && Use.isUse() && Use.getReg() &&
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@ -2568,8 +2570,7 @@ void SimpleRegisterCoalescing::CalculateSpillWeights() {
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for (MachineBasicBlock::const_iterator mii = MBB->begin(), mie = MBB->end();
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mii != mie; ++mii) {
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const MachineInstr *MI = mii;
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unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
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if (tii_->isIdentityCopy(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
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if (tii_->isIdentityCopy(*MI))
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continue;
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if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
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@ -2705,34 +2706,27 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
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MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG) &&
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"Unrecognized copy instruction");
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DstReg = MI->getOperand(0).getReg();
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// Do not delete subreg_to_reg, insert_subreg with undef source unless
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// the definition is dead. e.g.
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// %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
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// or else the scavenger may complain. These will be eliminated by the
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// rewriter or the subreg lowering pass.
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if (TargetRegisterInfo::isPhysicalRegister(DstReg))
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// Don't delete extract_subreg of a physical register.
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DoDelete = false;
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else if (MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG ||
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(MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG &&
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MI->getOperand(1).isUndef()))
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// Do not delete extract_subreg, insert_subreg of physical
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// registers unless the definition is dead. e.g.
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// %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
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// or else the scavenger may complain. LowerSubregs will
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// delete them later.
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DoDelete = false;
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}
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if (MI->registerDefIsDead(DstReg)) {
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LiveInterval &li = li_->getInterval(DstReg);
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if (!ShortenDeadCopySrcLiveRange(li, MI))
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ShortenDeadCopyLiveRange(li, MI);
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DoDelete = true;
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}
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if (!DoDelete) {
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if (!DoDelete)
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mii = next(mii);
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} else {
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else {
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li_->RemoveMachineInstrFromMaps(MI);
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mii = mbbi->erase(mii);
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++numPeep;
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}
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++numPeep;
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continue;
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}
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@ -2770,7 +2764,8 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
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}
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// If the move will be an identity move delete it
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if (tii_->isIdentityCopy(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) {
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bool isMove= tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx);
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if (isMove && SrcReg == DstReg) {
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if (li_->hasInterval(SrcReg)) {
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LiveInterval &RegInt = li_->getInterval(SrcReg);
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// If def of this move instruction is dead, remove its live range
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@ -495,7 +495,7 @@ static bool InvalidateRegDef(MachineBasicBlock::iterator I,
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MachineOperand *DefOp = NULL;
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for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = DefMI->getOperand(i);
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if (!MO.isReg() || MO.isUse() || !MO.isKill() || MO.isUndef())
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if (!MO.isReg() || !MO.isUse() || !MO.isKill() || MO.isUndef())
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continue;
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if (MO.getReg() == Reg)
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DefOp = &MO;
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@ -2258,7 +2258,7 @@ private:
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// eliminate this or else the undef marker is lost and it will
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// confuses the scavenger. This is extremely rare.
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unsigned Src, Dst, SrcSR, DstSR;
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if (TII->isIdentityCopy(MI, Src, Dst, SrcSR, DstSR) &&
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if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) && Src == Dst &&
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!MI.findRegisterUseOperand(Src)->isUndef()) {
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++NumDCE;
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DEBUG(errs() << "Removing now-noop copy: " << MI);
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@ -2347,7 +2347,7 @@ private:
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// instruction before considering the dest reg to be changed.
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{
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unsigned Src, Dst, SrcSR, DstSR;
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if (TII->isIdentityCopy(MI, Src, Dst, SrcSR, DstSR)) {
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if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) && Src == Dst) {
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++NumDCE;
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DEBUG(errs() << "Removing now-noop copy: " << MI);
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InvalidateKills(MI, TRI, RegKills, KillOps);
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171
test/CodeGen/X86/2009-10-25-RewriterBug.ll
Normal file
171
test/CodeGen/X86/2009-10-25-RewriterBug.ll
Normal file
@ -0,0 +1,171 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim
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%struct.DecRefPicMarking_t = type { i32, i32, i32, i32, i32, %struct.DecRefPicMarking_t* }
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%struct.FrameStore = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.StorablePicture*, %struct.StorablePicture*, %struct.StorablePicture* }
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%struct.StorablePicture = type { i32, i32, i32, i32, i32, [50 x [6 x [33 x i64]]], [50 x [6 x [33 x i64]]], [50 x [6 x [33 x i64]]], [50 x [6 x [33 x i64]]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16**, i16***, i8*, i16**, i8***, i64***, i64***, i16****, i8**, i8**, %struct.StorablePicture*, %struct.StorablePicture*, %struct.StorablePicture*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, %struct.DecRefPicMarking_t*, i32 }
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define fastcc void @insert_picture_in_dpb(%struct.FrameStore* nocapture %fs, %struct.StorablePicture* %p) nounwind ssp {
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entry:
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%0 = getelementptr inbounds %struct.FrameStore* %fs, i64 0, i32 12 ; <%struct.StorablePicture**> [#uses=1]
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%1 = icmp eq i32 undef, 0 ; <i1> [#uses=1]
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br i1 %1, label %bb.i, label %bb36.i
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bb.i: ; preds = %entry
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br i1 undef, label %bb3.i, label %bb14.preheader.i
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bb3.i: ; preds = %bb.i
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unreachable
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bb14.preheader.i: ; preds = %bb.i
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br i1 undef, label %bb9.i, label %bb20.preheader.i
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bb9.i: ; preds = %bb9.i, %bb14.preheader.i
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br i1 undef, label %bb9.i, label %bb20.preheader.i
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bb20.preheader.i: ; preds = %bb9.i, %bb14.preheader.i
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br i1 undef, label %bb18.i, label %bb29.preheader.i
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bb18.i: ; preds = %bb20.preheader.i
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unreachable
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bb29.preheader.i: ; preds = %bb20.preheader.i
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br i1 undef, label %bb24.i, label %bb30.i
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bb24.i: ; preds = %bb29.preheader.i
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unreachable
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bb30.i: ; preds = %bb29.preheader.i
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store i32 undef, i32* undef, align 8
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br label %bb67.preheader.i
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bb36.i: ; preds = %entry
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br label %bb67.preheader.i
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bb67.preheader.i: ; preds = %bb36.i, %bb30.i
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%2 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=2]
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%3 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=2]
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%4 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=2]
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%5 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
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%6 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
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%7 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
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%8 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
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%9 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
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%10 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
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%11 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
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%12 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
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br i1 undef, label %bb38.i, label %bb68.i
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bb38.i: ; preds = %bb66.i, %bb67.preheader.i
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%13 = phi %struct.StorablePicture* [ %37, %bb66.i ], [ %2, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%14 = phi %struct.StorablePicture* [ %38, %bb66.i ], [ %3, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%15 = phi %struct.StorablePicture* [ %39, %bb66.i ], [ %4, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%16 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %5, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%17 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %6, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%18 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %7, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%19 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %8, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%20 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %9, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%21 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %10, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%22 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %11, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%23 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %12, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
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%indvar248.i = phi i64 [ %indvar.next249.i, %bb66.i ], [ 0, %bb67.preheader.i ] ; <i64> [#uses=3]
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%storemerge52.i = trunc i64 %indvar248.i to i32 ; <i32> [#uses=1]
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%24 = getelementptr inbounds %struct.StorablePicture* %23, i64 0, i32 19 ; <i32*> [#uses=0]
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br i1 undef, label %bb.nph51.i, label %bb66.i
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bb.nph51.i: ; preds = %bb38.i
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%25 = sdiv i32 %storemerge52.i, 8 ; <i32> [#uses=0]
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br label %bb39.i
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bb39.i: ; preds = %bb64.i, %bb.nph51.i
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%26 = phi %struct.StorablePicture* [ %17, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=1]
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%27 = phi %struct.StorablePicture* [ %18, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
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%28 = phi %struct.StorablePicture* [ %19, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
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%29 = phi %struct.StorablePicture* [ %20, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
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%30 = phi %struct.StorablePicture* [ %21, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
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%31 = phi %struct.StorablePicture* [ %22, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
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br i1 undef, label %bb57.i, label %bb40.i
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bb40.i: ; preds = %bb39.i
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br i1 undef, label %bb57.i, label %bb41.i
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bb41.i: ; preds = %bb40.i
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%storemerge10.i = select i1 undef, i32 2, i32 4 ; <i32> [#uses=1]
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%32 = zext i32 %storemerge10.i to i64 ; <i64> [#uses=1]
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br i1 undef, label %bb45.i, label %bb47.i
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bb45.i: ; preds = %bb41.i
|
||||
%33 = getelementptr inbounds %struct.StorablePicture* %26, i64 0, i32 5, i64 undef, i64 %32, i64 undef ; <i64*> [#uses=1]
|
||||
%34 = load i64* %33, align 8 ; <i64> [#uses=1]
|
||||
br label %bb47.i
|
||||
|
||||
bb47.i: ; preds = %bb45.i, %bb41.i
|
||||
%storemerge11.i = phi i64 [ %34, %bb45.i ], [ 0, %bb41.i ] ; <i64> [#uses=0]
|
||||
%scevgep246.i = getelementptr i64* undef, i64 undef ; <i64*> [#uses=0]
|
||||
br label %bb64.i
|
||||
|
||||
bb57.i: ; preds = %bb40.i, %bb39.i
|
||||
br i1 undef, label %bb58.i, label %bb60.i
|
||||
|
||||
bb58.i: ; preds = %bb57.i
|
||||
br label %bb60.i
|
||||
|
||||
bb60.i: ; preds = %bb58.i, %bb57.i
|
||||
%35 = load i64*** undef, align 8 ; <i64**> [#uses=1]
|
||||
%scevgep256.i = getelementptr i64** %35, i64 %indvar248.i ; <i64**> [#uses=1]
|
||||
%36 = load i64** %scevgep256.i, align 8 ; <i64*> [#uses=1]
|
||||
%scevgep243.i = getelementptr i64* %36, i64 undef ; <i64*> [#uses=1]
|
||||
store i64 -1, i64* %scevgep243.i, align 8
|
||||
br label %bb64.i
|
||||
|
||||
bb64.i: ; preds = %bb60.i, %bb47.i
|
||||
br i1 undef, label %bb39.i, label %bb66.i
|
||||
|
||||
bb66.i: ; preds = %bb64.i, %bb38.i
|
||||
%37 = phi %struct.StorablePicture* [ %13, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=2]
|
||||
%38 = phi %struct.StorablePicture* [ %14, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=2]
|
||||
%39 = phi %struct.StorablePicture* [ %15, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=2]
|
||||
%40 = phi %struct.StorablePicture* [ %16, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=8]
|
||||
%indvar.next249.i = add i64 %indvar248.i, 1 ; <i64> [#uses=1]
|
||||
br i1 undef, label %bb38.i, label %bb68.i
|
||||
|
||||
bb68.i: ; preds = %bb66.i, %bb67.preheader.i
|
||||
%41 = phi %struct.StorablePicture* [ %2, %bb67.preheader.i ], [ %37, %bb66.i ] ; <%struct.StorablePicture*> [#uses=0]
|
||||
%42 = phi %struct.StorablePicture* [ %3, %bb67.preheader.i ], [ %38, %bb66.i ] ; <%struct.StorablePicture*> [#uses=1]
|
||||
%43 = phi %struct.StorablePicture* [ %4, %bb67.preheader.i ], [ %39, %bb66.i ] ; <%struct.StorablePicture*> [#uses=1]
|
||||
br i1 undef, label %bb.nph48.i, label %bb108.i
|
||||
|
||||
bb.nph48.i: ; preds = %bb68.i
|
||||
br label %bb80.i
|
||||
|
||||
bb80.i: ; preds = %bb104.i, %bb.nph48.i
|
||||
%44 = phi %struct.StorablePicture* [ %42, %bb.nph48.i ], [ null, %bb104.i ] ; <%struct.StorablePicture*> [#uses=1]
|
||||
%45 = phi %struct.StorablePicture* [ %43, %bb.nph48.i ], [ null, %bb104.i ] ; <%struct.StorablePicture*> [#uses=1]
|
||||
br i1 undef, label %bb.nph39.i, label %bb104.i
|
||||
|
||||
bb.nph39.i: ; preds = %bb80.i
|
||||
br label %bb81.i
|
||||
|
||||
bb81.i: ; preds = %bb102.i, %bb.nph39.i
|
||||
%46 = phi %struct.StorablePicture* [ %44, %bb.nph39.i ], [ %48, %bb102.i ] ; <%struct.StorablePicture*> [#uses=0]
|
||||
%47 = phi %struct.StorablePicture* [ %45, %bb.nph39.i ], [ %48, %bb102.i ] ; <%struct.StorablePicture*> [#uses=0]
|
||||
br i1 undef, label %bb83.i, label %bb82.i
|
||||
|
||||
bb82.i: ; preds = %bb81.i
|
||||
br i1 undef, label %bb83.i, label %bb101.i
|
||||
|
||||
bb83.i: ; preds = %bb82.i, %bb81.i
|
||||
br label %bb102.i
|
||||
|
||||
bb101.i: ; preds = %bb82.i
|
||||
br label %bb102.i
|
||||
|
||||
bb102.i: ; preds = %bb101.i, %bb83.i
|
||||
%48 = load %struct.StorablePicture** %0, align 8 ; <%struct.StorablePicture*> [#uses=2]
|
||||
br i1 undef, label %bb81.i, label %bb104.i
|
||||
|
||||
bb104.i: ; preds = %bb102.i, %bb80.i
|
||||
br label %bb80.i
|
||||
|
||||
bb108.i: ; preds = %bb68.i
|
||||
unreachable
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user