mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-17 05:29:24 +00:00
Fix a bogus srem rule - a negative value srem'd by a power-of-2
can have a non-negative result; for example, -16%16 is 0. Also, clarify the related comments. This fixes PR2670. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54767 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
289983123b
commit
a60832b018
@ -369,15 +369,13 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
|
||||
ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD,
|
||||
Depth+1);
|
||||
|
||||
// The sign of a remainder is equal to the sign of the first
|
||||
// operand (zero being positive).
|
||||
// If the sign bit of the first operand is zero, the sign bit of
|
||||
// the result is zero. If the first operand has no one bits below
|
||||
// the second operand's single 1 bit, its sign will be zero.
|
||||
if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
|
||||
KnownZero2 |= ~LowBits;
|
||||
else if (KnownOne2[BitWidth-1])
|
||||
KnownOne2 |= ~LowBits;
|
||||
|
||||
KnownZero |= KnownZero2 & Mask;
|
||||
KnownOne |= KnownOne2 & Mask;
|
||||
|
||||
assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
|
||||
}
|
||||
|
@ -1656,15 +1656,13 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
|
||||
APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
|
||||
ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
|
||||
|
||||
// The sign of a remainder is equal to the sign of the first
|
||||
// operand (zero being positive).
|
||||
// If the sign bit of the first operand is zero, the sign bit of
|
||||
// the result is zero. If the first operand has no one bits below
|
||||
// the second operand's single 1 bit, its sign will be zero.
|
||||
if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
|
||||
KnownZero2 |= ~LowBits;
|
||||
else if (KnownOne2[BitWidth-1])
|
||||
KnownOne2 |= ~LowBits;
|
||||
|
||||
KnownZero |= KnownZero2 & Mask;
|
||||
KnownOne |= KnownOne2 & Mask;
|
||||
|
||||
assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
|
||||
}
|
||||
|
@ -1266,11 +1266,8 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
|
||||
|
||||
if (LHSKnownZero[BitWidth-1] || ((LHSKnownZero & LowBits) == LowBits))
|
||||
LHSKnownZero |= ~LowBits;
|
||||
else if (LHSKnownOne[BitWidth-1])
|
||||
LHSKnownOne |= ~LowBits;
|
||||
|
||||
KnownZero |= LHSKnownZero & DemandedMask;
|
||||
KnownOne |= LHSKnownOne & DemandedMask;
|
||||
|
||||
assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
|
||||
}
|
||||
|
18
test/Transforms/InstCombine/srem1.ll
Normal file
18
test/Transforms/InstCombine/srem1.ll
Normal file
@ -0,0 +1,18 @@
|
||||
; RUN: llvm-as < %s | opt -instcombine
|
||||
; PR2670
|
||||
|
||||
@g_127 = external global i32 ; <i32*> [#uses=1]
|
||||
|
||||
define i32 @func_56(i32 %p_58, i32 %p_59, i32 %p_61, i16 signext %p_62) nounwind {
|
||||
entry:
|
||||
%call = call i32 (...)* @rshift_s_s( i32 %p_61, i32 1 ) ; <i32> [#uses=1]
|
||||
%conv = sext i32 %call to i64 ; <i64> [#uses=1]
|
||||
%or = or i64 -1734012817166602727, %conv ; <i64> [#uses=1]
|
||||
%rem = srem i64 %or, 1 ; <i64> [#uses=1]
|
||||
%cmp = icmp eq i64 %rem, 1 ; <i1> [#uses=1]
|
||||
%cmp.ext = zext i1 %cmp to i32 ; <i32> [#uses=1]
|
||||
store i32 %cmp.ext, i32* @g_127
|
||||
ret i32 undef
|
||||
}
|
||||
|
||||
declare i32 @rshift_s_s(...)
|
Loading…
Reference in New Issue
Block a user