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[mips][mips64r6] madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are not available on MIPS32r6/MIPS64r6

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Summary:
This patch updates both the assembler and the code generator.

MIPS32r6/MIPS64r6 replaces them with maddf.[ds] and msubf.[ds] which are fused
multiply-add/sub operations. We don't emit these yet, this patch only prevents the removed instructions from being emitted.

Depends on D3955

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3956

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210763 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders
2014-06-12 11:04:18 +00:00
parent d94bc707c4
commit a61aa38ee1
5 changed files with 322 additions and 45 deletions
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test/CodeGen/Mips/fmadd1.ll
+292 -32
View File
@@ -5,15 +5,54 @@
; IEEE 754 (1985) and IEEE 754 (2008). These instructions are therefore only
; available when -enable-no-nans-fp-math is given.
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -enable-no-nans-fp-math | FileCheck %s -check-prefix=32R2 -check-prefix=CHECK
; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefix=64R2 -check-prefix=CHECK
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=32R2NAN -check-prefix=CHECK
; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=64R2NAN -check-prefix=CHECK
; RUN: llc < %s -march=mipsel -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=32 -check-prefix=32-NONAN
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=32R2 -check-prefix=32R2-NONAN
; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=32R6 -check-prefix=32R6-NONAN
; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=64 -check-prefix=64-NONAN
; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=64R2 -check-prefix=64R2-NONAN
; RUN: llc < %s -march=mips64el -mcpu=mips64r6 -mattr=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=64R6 -check-prefix=64R6-NONAN
; RUN: llc < %s -march=mipsel -mcpu=mips32 | FileCheck %s -check-prefix=ALL -check-prefix=32 -check-prefix=32-NAN
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=ALL -check-prefix=32R2 -check-prefix=32R2-NAN
; RUN: llc < %s -march=mipsel -mcpu=mips32r6 | FileCheck %s -check-prefix=ALL -check-prefix=32R6 -check-prefix=32R6-NAN
; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=ALL -check-prefix=64 -check-prefix=64-NAN
; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=ALL -check-prefix=64R2 -check-prefix=64R2-NAN
; RUN: llc < %s -march=mips64el -mcpu=mips64r6 -mattr=n64 | FileCheck %s -check-prefix=ALL -check-prefix=64R6 -check-prefix=64R6-NAN
define float @FOO0float(float %a, float %b, float %c) nounwind readnone {
entry:
; CHECK-LABEL: FOO0float:
; CHECK: madd.s
; ALL-LABEL: FOO0float:
; 32-DAG: mtc1 $6, $[[T0:f[0-9]+]]
; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
; 32-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32-DAG: add.s $f0, $[[T1]], $[[T2]]
; 32R2: mtc1 $6, $[[T0:f[0-9]+]]
; 32R2: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
; 32R2: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R2: add.s $f0, $[[T1]], $[[T2]]
; 32R6-DAG: mtc1 $6, $[[T0:f[0-9]+]]
; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
; 32R6-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R6-DAG: add.s $f0, $[[T1]], $[[T2]]
; 64-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
; 64-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $f14
; 64-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 64-DAG: add.s $f0, $[[T1]], $[[T2]]
; 64R2: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]
; 64R2: add.s $f0, $[[T0]], $[[T1]]
; 64R6-DAG: mul.s $[[T0:f[0-9]+]], $f12, $f13
; 64R6-DAG: add.s $[[T1:f[0-9]+]], $[[T0]], $f14
; 64R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 64R6-DAG: add.s $f0, $[[T1]], $[[T2]]
%mul = fmul float %a, %b
%add = fadd float %mul, %c
%add1 = fadd float %add, 0.000000e+00
@@ -22,8 +61,39 @@ entry:
define float @FOO1float(float %a, float %b, float %c) nounwind readnone {
entry:
; CHECK-LABEL: FOO1float:
; CHECK: msub.s
; ALL-LABEL: FOO1float:
; 32-DAG: mtc1 $6, $[[T0:f[0-9]+]]
; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
; 32-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32-DAG: add.s $f0, $[[T1]], $[[T2]]
; 32R2: mtc1 $6, $[[T0:f[0-9]+]]
; 32R2: msub.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
; 32R2: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R2: add.s $f0, $[[T1]], $[[T2]]
; 32R6-DAG: mtc1 $6, $[[T0:f[0-9]+]]
; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
; 32R6-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R6-DAG: add.s $f0, $[[T1]], $[[T2]]
; 64-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
; 64-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $f14
; 64-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 64-DAG: add.s $f0, $[[T1]], $[[T2]]
; 64R2: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f13
; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]
; 64R2: add.s $f0, $[[T0]], $[[T1]]
; 64R6-DAG: mul.s $[[T0:f[0-9]+]], $f12, $f13
; 64R6-DAG: sub.s $[[T1:f[0-9]+]], $[[T0]], $f14
; 64R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 64R6-DAG: add.s $f0, $[[T1]], $[[T2]]
%mul = fmul float %a, %b
%sub = fsub float %mul, %c
%add = fadd float %sub, 0.000000e+00
@@ -32,11 +102,44 @@ entry:
define float @FOO2float(float %a, float %b, float %c) nounwind readnone {
entry:
; CHECK-LABEL: FOO2float:
; 32R2: nmadd.s
; 64R2: nmadd.s
; 32R2NAN: madd.s
; 64R2NAN: madd.s
; ALL-LABEL: FOO2float:
; 32-DAG: mtc1 $6, $[[T0:f[0-9]+]]
; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
; 32-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32-DAG: sub.s $f0, $[[T2]], $[[T1]]
; 32R2-NONAN: mtc1 $6, $[[T0:f[0-9]+]]
; 32R2-NONAN: nmadd.s $f0, $[[T0]], $f12, $f14
; 32R2-NAN: mtc1 $6, $[[T0:f[0-9]+]]
; 32R2-NAN: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
; 32R2-NAN: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R2-NAN: sub.s $f0, $[[T2]], $[[T1]]
; 32R6-DAG: mtc1 $6, $[[T0:f[0-9]+]]
; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
; 32R6-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R6-DAG: sub.s $f0, $[[T2]], $[[T1]]
; 64-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
; 64-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $f14
; 64-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 64-DAG: sub.s $f0, $[[T2]], $[[T1]]
; 64R2-NONAN: nmadd.s $f0, $f14, $f12, $f13
; 64R2-NAN: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]
; 64R2-NAN: sub.s $f0, $[[T1]], $[[T0]]
; 64R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
; 64R6-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $f14
; 64R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 64R6-DAG: sub.s $f0, $[[T2]], $[[T1]]
%mul = fmul float %a, %b
%add = fadd float %mul, %c
%sub = fsub float 0.000000e+00, %add
@@ -45,11 +148,36 @@ entry:
define float @FOO3float(float %a, float %b, float %c) nounwind readnone {
entry:
; CHECK-LABEL: FOO3float:
; 32R2: nmsub.s
; 64R2: nmsub.s
; 32R2NAN: msub.s
; 64R2NAN: msub.s
; ALL-LABEL: FOO3float:
; 32-DAG: mtc1 $6, $[[T0:f[0-9]+]]
; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
; 32-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32-DAG: sub.s $f0, $[[T2]], $[[T1]]
; 32R2-NONAN: mtc1 $6, $[[T0:f[0-9]+]]
; 32R2-NONAN: nmsub.s $f0, $[[T0]], $f12, $f14
; 32R2-NAN: mtc1 $6, $[[T0:f[0-9]+]]
; 32R2-NAN: msub.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
; 32R2-NAN: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R2-NAN: sub.s $f0, $[[T2]], $[[T1]]
; 64-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
; 64-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $f14
; 64-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 64-DAG: sub.s $f0, $[[T2]], $[[T1]]
; 64R2-NAN: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f13
; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]
; 64R2-NAN: sub.s $f0, $[[T1]], $[[T0]]
; 64R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
; 64R6-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $f14
; 64R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 64R6-DAG: sub.s $f0, $[[T2]], $[[T1]]
%mul = fmul float %a, %b
%sub = fsub float %mul, %c
%sub1 = fsub float 0.000000e+00, %sub
@@ -58,8 +186,40 @@ entry:
define double @FOO10double(double %a, double %b, double %c) nounwind readnone {
entry:
; CHECK-LABEL: FOO10double:
; CHECK: madd.d
; ALL-LABEL: FOO10double:
; 32-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
; 32-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32-DAG: add.d $f0, $[[T1]], $[[T2]]
; 32R2: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R2: madd.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
; 32R2: mtc1 $zero, $[[T2:f[02468]+]]
; 32R2: mtc1 $zero, ${{f[13579]+}}
; 32R2: add.d $f0, $[[T1]], $[[T2]]
; 32R6-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
; 32R6-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R6-DAG: add.d $f0, $[[T1]], $[[T2]]
; 64-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
; 64-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14
; 64-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
; 64-DAG: add.d $f0, $[[T1]], $[[T2]]
; 64R2: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13
; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]
; 64R2: add.d $f0, $[[T0]], $[[T1]]
; 64R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
; 64R6-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14
; 64R6-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
; 64R6-DAG: add.d $f0, $[[T1]], $[[T2]]
%mul = fmul double %a, %b
%add = fadd double %mul, %c
%add1 = fadd double %add, 0.000000e+00
@@ -68,8 +228,40 @@ entry:
define double @FOO11double(double %a, double %b, double %c) nounwind readnone {
entry:
; CHECK-LABEL: FOO11double:
; CHECK: msub.d
; ALL-LABEL: FOO11double:
; 32-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
; 32-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32-DAG: add.d $f0, $[[T1]], $[[T2]]
; 32R2: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R2: msub.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
; 32R2: mtc1 $zero, $[[T2:f[02468]+]]
; 32R2: mtc1 $zero, ${{f[13579]+}}
; 32R2: add.d $f0, $[[T1]], $[[T2]]
; 32R6-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
; 32R6-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R6-DAG: add.d $f0, $[[T1]], $[[T2]]
; 64-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
; 64-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14
; 64-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
; 64-DAG: add.d $f0, $[[T1]], $[[T2]]
; 64R2: msub.d $[[T0:f[0-9]+]], $f14, $f12, $f13
; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]
; 64R2: add.d $f0, $[[T0]], $[[T1]]
; 64R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
; 64R6-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14
; 64R6-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
; 64R6-DAG: add.d $f0, $[[T1]], $[[T2]]
%mul = fmul double %a, %b
%sub = fsub double %mul, %c
%add = fadd double %sub, 0.000000e+00
@@ -78,11 +270,45 @@ entry:
define double @FOO12double(double %a, double %b, double %c) nounwind readnone {
entry:
; CHECK-LABEL: FOO12double:
; 32R2: nmadd.d
; 64R2: nmadd.d
; 32R2NAN: madd.d
; 64R2NAN: madd.d
; ALL-LABEL: FOO12double:
; 32-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
; 32-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32-DAG: sub.d $f0, $[[T2]], $[[T1]]
; 32R2-NONAN: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R2-NONAN: nmadd.d $f0, $[[T0]], $f12, $f14
; 32R2-NAN: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R2-NAN: madd.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
; 32R2-NAN: mtc1 $zero, $[[T2:f[02468]+]]
; 32R2-NAN: mtc1 $zero, ${{f[13579]+}}
; 32R2-NAN: sub.d $f0, $[[T2]], $[[T1]]
; 32R6-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
; 32R6-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R6-DAG: sub.d $f0, $[[T2]], $[[T1]]
; 64-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
; 64-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14
; 64-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
; 64-DAG: sub.d $f0, $[[T2]], $[[T1]]
; 64R2-NONAN: nmadd.d $f0, $f14, $f12, $f13
; 64R2-NAN: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13
; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]
; 64R2-NAN: sub.d $f0, $[[T1]], $[[T0]]
; 64R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
; 64R6-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14
; 64R6-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
; 64R6-DAG: sub.d $f0, $[[T2]], $[[T1]]
%mul = fmul double %a, %b
%add = fadd double %mul, %c
%sub = fsub double 0.000000e+00, %add
@@ -91,11 +317,45 @@ entry:
define double @FOO13double(double %a, double %b, double %c) nounwind readnone {
entry:
; CHECK-LABEL: FOO13double:
; 32R2: nmsub.d
; 64R2: nmsub.d
; 32R2NAN: msub.d
; 64R2NAN: msub.d
; ALL-LABEL: FOO13double:
; 32-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
; 32-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32-DAG: sub.d $f0, $[[T2]], $[[T1]]
; 32R2-NONAN: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R2-NONAN: nmsub.d $f0, $[[T0]], $f12, $f14
; 32R2-NAN: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R2-NAN: msub.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
; 32R2-NAN: mtc1 $zero, $[[T2:f[02468]+]]
; 32R2-NAN: mtc1 $zero, ${{f[13579]+}}
; 32R2-NAN: sub.d $f0, $[[T2]], $[[T1]]
; 32R6-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
; 32R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
; 32R6-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
; 32R6-DAG: sub.d $f0, $[[T2]], $[[T1]]
; 64-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
; 64-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14
; 64-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
; 64-DAG: sub.d $f0, $[[T2]], $[[T1]]
; 64R2-NONAN: nmsub.d $f0, $f14, $f12, $f13
; 64R2-NAN: msub.d $[[T0:f[0-9]+]], $f14, $f12, $f13
; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]
; 64R2-NAN: sub.d $f0, $[[T1]], $[[T0]]
; 64R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
; 64R6-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14
; 64R6-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
; 64R6-DAG: sub.d $f0, $[[T2]], $[[T1]]
%mul = fmul double %a, %b
%sub = fsub double %mul, %c
%sub1 = fsub double 0.000000e+00, %sub