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https://github.com/c64scene-ar/llvm-6502.git
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Don't call SelectionDAG.getRoot() directly, go through a forwarding method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19642 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -205,6 +205,12 @@ public:
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FuncInfo(funcinfo) {
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}
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/// getRoot - Return the current virtual root of the Selection DAG.
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///
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SDOperand getRoot() {
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return DAG.getRoot();
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}
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void visit(Instruction &I) { visit(I.getOpcode(), I); }
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void visit(unsigned Opcode, User &I) {
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@ -359,7 +365,7 @@ public:
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void SelectionDAGLowering::visitRet(ReturnInst &I) {
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if (I.getNumOperands() == 0) {
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DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, DAG.getRoot()));
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DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, getRoot()));
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return;
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}
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@ -385,7 +391,7 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
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break; // No extension needed!
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}
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DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, DAG.getRoot(), Op1));
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DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, getRoot(), Op1));
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}
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void SelectionDAGLowering::visitBr(BranchInst &I) {
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@ -402,7 +408,7 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
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if (I.isUnconditional()) {
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// If this is not a fall-through branch, emit the branch.
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if (Succ0MBB != NextBlock)
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DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, DAG.getRoot(),
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DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, getRoot(),
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DAG.getBasicBlock(Succ0MBB)));
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} else {
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MachineBasicBlock *Succ1MBB = FuncInfo.MBBMap[I.getSuccessor(1)];
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@ -413,21 +419,21 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
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if (Succ1MBB == NextBlock) {
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// If the condition is false, fall through. This means we should branch
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// if the condition is true to Succ #0.
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DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, DAG.getRoot(),
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DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
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Cond, DAG.getBasicBlock(Succ0MBB)));
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} else if (Succ0MBB == NextBlock) {
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// If the condition is true, fall through. This means we should branch if
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// the condition is false to Succ #1. Invert the condition first.
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SDOperand True = DAG.getConstant(1, Cond.getValueType());
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Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True);
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DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, DAG.getRoot(),
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DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
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Cond, DAG.getBasicBlock(Succ1MBB)));
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} else {
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// Neither edge is a fall through. If the comparison is true, jump to
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// Succ#0, otherwise branch unconditionally to succ #1.
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DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, DAG.getRoot(),
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DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
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Cond, DAG.getBasicBlock(Succ0MBB)));
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DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, DAG.getRoot(),
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DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, getRoot(),
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DAG.getBasicBlock(Succ1MBB)));
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}
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}
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@ -572,7 +578,7 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
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}
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SDOperand DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, AllocSize.getValueType(),
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DAG.getRoot(), AllocSize,
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getRoot(), AllocSize,
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getIntPtrConstant(Align));
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DAG.setRoot(setValue(&I, DSA).getValue(1));
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@ -584,7 +590,7 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
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void SelectionDAGLowering::visitLoad(LoadInst &I) {
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SDOperand Ptr = getValue(I.getOperand(0));
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SDOperand L = DAG.getLoad(TLI.getValueType(I.getType()), DAG.getRoot(), Ptr);
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SDOperand L = DAG.getLoad(TLI.getValueType(I.getType()), getRoot(), Ptr);
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DAG.setRoot(setValue(&I, L).getValue(1));
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}
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@ -593,7 +599,7 @@ void SelectionDAGLowering::visitStore(StoreInst &I) {
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Value *SrcV = I.getOperand(0);
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SDOperand Src = getValue(SrcV);
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SDOperand Ptr = getValue(I.getOperand(1));
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DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, DAG.getRoot(), Src, Ptr));
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DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr));
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}
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void SelectionDAGLowering::visitCall(CallInst &I) {
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@ -637,7 +643,7 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
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}
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std::pair<SDOperand,SDOperand> Result =
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TLI.LowerCallTo(DAG.getRoot(), I.getType(), Callee, Args, DAG);
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TLI.LowerCallTo(getRoot(), I.getType(), Callee, Args, DAG);
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if (I.getType() != Type::VoidTy)
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setValue(&I, Result.first);
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DAG.setRoot(Result.second);
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@ -659,7 +665,7 @@ void SelectionDAGLowering::visitMalloc(MallocInst &I) {
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Args.push_back(std::make_pair(Src, TLI.getTargetData().getIntPtrType()));
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std::pair<SDOperand,SDOperand> Result =
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TLI.LowerCallTo(DAG.getRoot(), I.getType(),
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TLI.LowerCallTo(getRoot(), I.getType(),
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DAG.getExternalSymbol("malloc", IntPtr),
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Args, DAG);
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setValue(&I, Result.first); // Pointers always fit in registers
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@ -672,7 +678,7 @@ void SelectionDAGLowering::visitFree(FreeInst &I) {
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TLI.getTargetData().getIntPtrType()));
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MVT::ValueType IntPtr = TLI.getPointerTy();
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std::pair<SDOperand,SDOperand> Result =
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TLI.LowerCallTo(DAG.getRoot(), Type::VoidTy,
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TLI.LowerCallTo(getRoot(), Type::VoidTy,
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DAG.getExternalSymbol("free", IntPtr), Args, DAG);
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DAG.setRoot(Result.second);
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}
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@ -708,14 +714,14 @@ TargetLowering::LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList,
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void SelectionDAGLowering::visitVAStart(CallInst &I) {
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std::pair<SDOperand,SDOperand> Result = TLI.LowerVAStart(DAG.getRoot(), DAG);
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std::pair<SDOperand,SDOperand> Result = TLI.LowerVAStart(getRoot(), DAG);
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setValue(&I, Result.first);
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DAG.setRoot(Result.second);
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}
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void SelectionDAGLowering::visitVAArg(VAArgInst &I) {
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std::pair<SDOperand,SDOperand> Result =
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TLI.LowerVAArgNext(false, DAG.getRoot(), getValue(I.getOperand(0)),
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TLI.LowerVAArgNext(false, getRoot(), getValue(I.getOperand(0)),
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I.getType(), DAG);
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setValue(&I, Result.first);
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DAG.setRoot(Result.second);
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@ -723,19 +729,19 @@ void SelectionDAGLowering::visitVAArg(VAArgInst &I) {
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void SelectionDAGLowering::visitVANext(VANextInst &I) {
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std::pair<SDOperand,SDOperand> Result =
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TLI.LowerVAArgNext(true, DAG.getRoot(), getValue(I.getOperand(0)),
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TLI.LowerVAArgNext(true, getRoot(), getValue(I.getOperand(0)),
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I.getArgType(), DAG);
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setValue(&I, Result.first);
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DAG.setRoot(Result.second);
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}
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void SelectionDAGLowering::visitVAEnd(CallInst &I) {
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DAG.setRoot(TLI.LowerVAEnd(DAG.getRoot(), getValue(I.getOperand(1)), DAG));
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DAG.setRoot(TLI.LowerVAEnd(getRoot(), getValue(I.getOperand(1)), DAG));
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}
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void SelectionDAGLowering::visitVACopy(CallInst &I) {
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std::pair<SDOperand,SDOperand> Result =
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TLI.LowerVACopy(DAG.getRoot(), getValue(I.getOperand(1)), DAG);
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TLI.LowerVACopy(getRoot(), getValue(I.getOperand(1)), DAG);
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setValue(&I, Result.first);
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DAG.setRoot(Result.second);
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}
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@ -757,14 +763,14 @@ SDOperand TargetLowering::LowerOperation(SDOperand Op) {
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void SelectionDAGLowering::visitFrameReturnAddress(CallInst &I, bool isFrame) {
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unsigned Depth = (unsigned)cast<ConstantUInt>(I.getOperand(1))->getValue();
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std::pair<SDOperand,SDOperand> Result =
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TLI.LowerFrameReturnAddress(isFrame, DAG.getRoot(), Depth, DAG);
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TLI.LowerFrameReturnAddress(isFrame, getRoot(), Depth, DAG);
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setValue(&I, Result.first);
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DAG.setRoot(Result.second);
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}
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void SelectionDAGLowering::visitMemIntrinsic(CallInst &I, unsigned Op) {
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std::vector<SDOperand> Ops;
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Ops.push_back(DAG.getRoot());
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Ops.push_back(getRoot());
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Ops.push_back(getValue(I.getOperand(1)));
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Ops.push_back(getValue(I.getOperand(2)));
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Ops.push_back(getValue(I.getOperand(3)));
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@ -811,7 +817,7 @@ CopyValueToVirtualRegister(SelectionDAGLowering &SDL, Value *V, unsigned Reg) {
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Op = DAG.getNode(ISD::ZERO_EXTEND, TLI.getTypeToTransformTo(VT), Op);
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}
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return DAG.getCopyToReg(DAG.getRoot(), Op, Reg);
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return DAG.getCopyToReg(SDL.getRoot(), Op, Reg);
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}
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/// IsOnlyUsedInOneBasicBlock - If the specified argument is only used in a
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@ -982,6 +988,9 @@ void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
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// Lower the terminator after the copies are emitted.
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SDL.visit(*LLVMBB->getTerminator());
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// Make sure the root of the DAG is up-to-date.
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DAG.setRoot(SDL.getRoot());
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}
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void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, MachineFunction &MF,
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