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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-04-06 09:44:39 +00:00
Remove unnecessary assignment to temporary, ResultReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150737 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1442,14 +1442,11 @@ bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
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// We have i1, i8, or i16, we need to either zero extend or sign extend.
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if (needsExt) {
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unsigned ResultReg;
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ResultReg = ARMEmitIntExt(SrcVT, SrcReg1, MVT::i32, isZExt);
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if (ResultReg == 0) return false;
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SrcReg1 = ResultReg;
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SrcReg1 = ARMEmitIntExt(SrcVT, SrcReg1, MVT::i32, isZExt);
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if (SrcReg1 == 0) return false;
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if (!UseImm) {
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ResultReg = ARMEmitIntExt(SrcVT, SrcReg2, MVT::i32, isZExt);
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if (ResultReg == 0) return false;
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SrcReg2 = ResultReg;
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SrcReg2 = ARMEmitIntExt(SrcVT, SrcReg2, MVT::i32, isZExt);
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if (SrcReg2 == 0) return false;
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}
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}
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@ -1566,10 +1563,9 @@ bool ARMFastISel::SelectIToFP(const Instruction *I, bool isSigned) {
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// Handle sign-extension.
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if (SrcVT == MVT::i16 || SrcVT == MVT::i8) {
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EVT DestVT = MVT::i32;
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unsigned ResultReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT,
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SrcReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT,
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/*isZExt*/!isSigned);
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if (ResultReg == 0) return false;
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SrcReg = ResultReg;
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if (SrcReg == 0) return false;
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}
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// The conversion routine works on fp-reg to fp-reg and the operand above
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@ -2047,9 +2043,8 @@ bool ARMFastISel::SelectRet(const Instruction *I) {
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assert(DestVT == MVT::i32 && "ARM should always ext to i32");
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bool isZExt = Outs[0].Flags.isZExt();
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unsigned ResultReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, isZExt);
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if (ResultReg == 0) return false;
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SrcReg = ResultReg;
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SrcReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, isZExt);
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if (SrcReg == 0) return false;
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}
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// Make the copy.
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