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Factor out LiveIntervalAnalysis' code to determine whether an instruction

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is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.

This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2009-10-09 23:27:56 +00:00
parent ac1ceb3dd3
commit a70dca156f
14 changed files with 161 additions and 130 deletions
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lib/CodeGen/MachineLICM.cpp
+1 -3
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@@ -317,12 +317,10 @@ bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
if (MI.getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
return false;
const TargetInstrDesc &TID = MI.getDesc();
// FIXME: For now, only hoist re-materilizable instructions. LICM will
// increase register pressure. We want to make sure it doesn't increase
// spilling.
if (!TII->isTriviallyReMaterializable(&MI))
if (!TII->isTriviallyReMaterializable(&MI, AA))
return false;
// If result(s) of this instruction is used by PHIs, then don't hoist it.