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Fix the predicate for memop64 to be a regular load, not just

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an unindexed load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57612 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-10-16 00:03:00 +00:00
parent 2276a7bc8e
commit a7250ddc28
1 changed files with 1 additions and 1 deletions
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2
lib/Target/X86/X86InstrSSE.td
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@ -134,7 +134,7 @@ def memopv16i8 : PatFrag<(ops node:$ptr), (v16i8 (memop node:$ptr))>;
// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
// 16-byte boundary.
// FIXME: 8 byte alignment for mmx reads is not required
def memop64 : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
return cast<LoadSDNode>(N)->getAlignment() >= 8;
}]>;