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Thumb2 assembly parsing and encoding for LDRD(immediate).

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Refactor operand handling for STRD as well. Tests for that forthcoming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139322 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2011-09-08 22:07:06 +00:00
parent 7ec8fb8830
commit a77295db19
8 changed files with 244 additions and 26 deletions
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17
lib/Target/ARM/ARMInstrFormats.td
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@@ -1100,8 +1100,8 @@ class T2Ipc<dag oops, dag iops, InstrItinClass itin,
string opc, string asm, list<dag> pattern>
: Thumb2I<oops, iops, AddrModeT2_pc, 4, itin, opc, asm, "", pattern>;
class T2Ii8s4<bit P, bit W, bit isLoad, dag oops, dag iops, InstrItinClass itin,
string opc, string asm, list<dag> pattern>
: Thumb2I<oops, iops, AddrModeT2_i8s4, 4, itin, opc, asm, "",
string opc, string asm, string cstr, list<dag> pattern>
: Thumb2I<oops, iops, AddrModeT2_i8s4, 4, itin, opc, asm, cstr,
pattern> {
bits<4> Rt;
bits<4> Rt2;
@@ -1117,14 +1117,14 @@ class T2Ii8s4<bit P, bit W, bit isLoad, dag oops, dag iops, InstrItinClass itin,
let Inst{11-8} = Rt2{3-0};
let Inst{7-0} = addr{7-0};
}
class T2Ii8s4Tied<bit P, bit W, bit isLoad, dag oops, dag iops, InstrItinClass itin,
string opc, string asm, list<dag> pattern>
: Thumb2I<oops, iops, AddrModeT2_i8s4, 4, itin, opc, asm, "$base = $wb",
class T2Ii8s4post<bit P, bit W, bit isLoad, dag oops, dag iops,
InstrItinClass itin, string opc, string asm, string cstr,
list<dag> pattern>
: Thumb2I<oops, iops, AddrModeT2_i8s4, 4, itin, opc, asm, cstr,
pattern> {
bits<4> Rt;
bits<4> Rt2;
bits<4> base;
bits<4> addr;
bits<9> imm;
let Inst{31-25} = 0b1110100;
let Inst{24} = P;
@@ -1132,13 +1132,12 @@ class T2Ii8s4Tied<bit P, bit W, bit isLoad, dag oops, dag iops, InstrItinClass i
let Inst{22} = 1;
let Inst{21} = W;
let Inst{20} = isLoad;
let Inst{19-16} = base{3-0};
let Inst{19-16} = addr;
let Inst{15-12} = Rt{3-0};
let Inst{11-8} = Rt2{3-0};
let Inst{7-0} = imm{7-0};
}
class T2sI<dag oops, dag iops, InstrItinClass itin,
string opc, string asm, list<dag> pattern>
: Thumb2sI<oops, iops, AddrModeNone, 4, itin, opc, asm, "", pattern>;