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Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to:
_test: fctiwz f0, f1 stfiwx f0, 0, r4 blr instead of: _test: fctiwz f0, f1 stfd f0, -8(r1) nop nop lwz r2, -4(r1) stb r2, 0(r4) blr The former is not correct (stores 4 bytes, not 1). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46161 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3184,6 +3184,7 @@ SDOperand PPCTargetLowering::PerformDAGCombine(SDNode *N,
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case ISD::STORE:
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case ISD::STORE:
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// Turn STORE (FP_TO_SINT F) -> STFIWX(FCTIWZ(F)).
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// Turn STORE (FP_TO_SINT F) -> STFIWX(FCTIWZ(F)).
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if (TM.getSubtarget<PPCSubtarget>().hasSTFIWX() &&
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if (TM.getSubtarget<PPCSubtarget>().hasSTFIWX() &&
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!cast<StoreSDNode>(N)->isTruncatingStore() &&
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N->getOperand(1).getOpcode() == ISD::FP_TO_SINT &&
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N->getOperand(1).getOpcode() == ISD::FP_TO_SINT &&
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N->getOperand(1).getValueType() == MVT::i32 &&
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N->getOperand(1).getValueType() == MVT::i32 &&
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N->getOperand(1).getOperand(0).getValueType() != MVT::ppcf128) {
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N->getOperand(1).getOperand(0).getValueType() != MVT::ppcf128) {
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11
test/CodeGen/PowerPC/stfiwx-2.ll
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11
test/CodeGen/PowerPC/stfiwx-2.ll
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@ -0,0 +1,11 @@
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; This cannot be a stfiwx
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; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | grep stb
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; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | not grep stfiwx
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define void @test(float %F, i8* %P) {
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%I = fptosi float %F to i32
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%X = trunc i32 %I to i8
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store i8 %X, i8* %P
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ret void
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}
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