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MC/ARM: Enable generation of the ARM asm matcher, not that it can do much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110782 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -7,11 +7,12 @@ tablegen(ARMGenInstrNames.inc -gen-instr-enums)
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tablegen(ARMGenInstrInfo.inc -gen-instr-desc)
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tablegen(ARMGenCodeEmitter.inc -gen-emitter)
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tablegen(ARMGenAsmWriter.inc -gen-asm-writer)
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tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher)
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tablegen(ARMGenDAGISel.inc -gen-dag-isel)
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tablegen(ARMGenFastISel.inc -gen-fast-isel)
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tablegen(ARMGenCallingConv.inc -gen-callingconv)
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tablegen(ARMGenSubtarget.inc -gen-subtarget)
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tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
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tablegen(ARMGenFastISel.inc -gen-fast-isel)
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add_llvm_target(ARMCodeGen
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ARMAsmPrinter.cpp
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@ -14,7 +14,7 @@ TARGET = ARM
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# Make sure that tblgen is run, first thing.
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BUILT_SOURCES = ARMGenRegisterInfo.h.inc ARMGenRegisterNames.inc \
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ARMGenRegisterInfo.inc ARMGenInstrNames.inc \
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ARMGenInstrInfo.inc ARMGenAsmWriter.inc \
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ARMGenInstrInfo.inc ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \
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ARMGenDAGISel.inc ARMGenSubtarget.inc \
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ARMGenCodeEmitter.inc ARMGenCallingConv.inc \
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ARMGenDecoderTables.inc ARMGenEDInfo.inc \
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