From a7d4a04d244c5a8c6364af2e39a512ec6b9600a2 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 3 May 2007 23:52:19 +0000 Subject: [PATCH] Don't create indexed load / store with zero offset! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36716 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 5977e88ee13..8396e45be30 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3110,6 +3110,10 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) { ISD::MemIndexedMode AM = ISD::UNINDEXED; if (!TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) return false; + // Don't create a indexed load / store with zero offset. + if (isa(Offset) && + cast(Offset)->getValue() == 0) + return false; // Try turning it into a pre-indexed load / store except when: // 1) The base is a frame index. @@ -3239,6 +3243,10 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) { std::swap(BasePtr, Offset); if (Ptr != BasePtr) continue; + // Don't create a indexed load / store with zero offset. + if (isa(Offset) && + cast(Offset)->getValue() == 0) + continue; // Try turning it into a post-indexed load / store except when // 1) All uses are load / store ops that use it as base ptr.