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https://github.com/c64scene-ar/llvm-6502.git
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[AArch64] Added vselect patterns with float and double types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199925 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -473,6 +473,10 @@ multiclass Neon_bitwise3V_patterns<SDPatternOperator opnode,
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(INST16B VPR128:$src, VPR128:$Rn, VPR128:$Rm)>;
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(INST16B VPR128:$src, VPR128:$Rn, VPR128:$Rm)>;
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def : Pat<(v2i64 (opnode (v2i64 VPR128:$src), VPR128:$Rn, VPR128:$Rm)),
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def : Pat<(v2i64 (opnode (v2i64 VPR128:$src), VPR128:$Rn, VPR128:$Rm)),
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(INST16B VPR128:$src, VPR128:$Rn, VPR128:$Rm)>;
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(INST16B VPR128:$src, VPR128:$Rn, VPR128:$Rm)>;
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def : Pat<(v2f64 (opnode (v2i64 VPR128:$src), VPR128:$Rn, VPR128:$Rm)),
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(INST16B VPR128:$src, VPR128:$Rn, VPR128:$Rm)>;
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def : Pat<(v4f32 (opnode (v4i32 VPR128:$src), VPR128:$Rn, VPR128:$Rm)),
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(INST16B VPR128:$src, VPR128:$Rn, VPR128:$Rm)>;
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// Allow to match BSL instruction pattern with non-constant operand
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// Allow to match BSL instruction pattern with non-constant operand
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def : Pat<(v8i8 (or (and VPR64:$Rn, VPR64:$Rd),
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def : Pat<(v8i8 (or (and VPR64:$Rn, VPR64:$Rd),
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@@ -220,3 +220,16 @@ entry:
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ret <2 x double> %vbsl3.i
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ret <2 x double> %vbsl3.i
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}
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}
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define <2 x double> @test_bsl_v2f64(<2 x i1> %v1, <2 x double> %v2, <2 x double> %v3) {
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; CHECK-LABEL: test_bsl_v2f64:
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; CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
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%1 = select <2 x i1> %v1, <2 x double> %v2, <2 x double> %v3
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ret <2 x double> %1
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}
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define <4 x float> @test_bsl_v4f32(<4 x i1> %v1, <4 x float> %v2, <4 x float> %v3) {
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; CHECK-LABEL: test_bsl_v4f32:
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; CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
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%1 = select <4 x i1> %v1, <4 x float> %v2, <4 x float> %v3
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ret <4 x float> %1
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}
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