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Add a convenience typedef for std::pair<unsigned, const TargetRegisterClass*>.

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No functional change.

Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134198 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2011-06-30 22:17:01 +00:00
parent 63b46faeb8
commit a8cca80d4a
1 changed files with 8 additions and 7 deletions
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15
lib/Target/ARM/ARMISelLowering.cpp
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@ -7527,7 +7527,8 @@ ARMTargetLowering::getSingleConstraintMatchWeight(
return weight;
}
std::pair<unsigned, const TargetRegisterClass*>
typedef std::pair<unsigned, const TargetRegisterClass*> Pair;
Pair
ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
EVT VT) const {
if (Constraint.size() == 1) {
@ -7535,18 +7536,18 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
switch (Constraint[0]) {
case 'l':
if (Subtarget->isThumb())
return std::make_pair(0U, ARM::tGPRRegisterClass);
return Pair(0U, ARM::tGPRRegisterClass);
else
return std::make_pair(0U, ARM::GPRRegisterClass);
return Pair(0U, ARM::GPRRegisterClass);
case 'r':
return std::make_pair(0U, ARM::GPRRegisterClass);
return Pair(0U, ARM::GPRRegisterClass);
case 'w':
if (VT == MVT::f32)
return std::make_pair(0U, ARM::SPRRegisterClass);
return Pair(0U, ARM::SPRRegisterClass);
if (VT.getSizeInBits() == 64)
return std::make_pair(0U, ARM::DPRRegisterClass);
return Pair(0U, ARM::DPRRegisterClass);
if (VT.getSizeInBits() == 128)
return std::make_pair(0U, ARM::QPRRegisterClass);
return Pair(0U, ARM::QPRRegisterClass);
break;
}
}