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Implement the isLoadFromStackSlot interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23387 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -92,6 +92,31 @@ void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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BuildMI(MBB, MI, Opc, 1, DestReg).addReg(SrcReg);
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}
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unsigned X86RegisterInfo::isLoadFromStackSlot(MachineInstr *MI,
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int &FrameIndex) const {
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switch (MI->getOpcode()) {
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default: break;
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case X86::MOV8rm:
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case X86::MOV16rm:
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case X86::MOV32rm:
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case X86::FLD64m:
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case X86::FLD80m:
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case X86::MOVAPDrm:
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case X86::MOVSDrm:
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if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() &&
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MI->getOperand(3).isRegister() && MI->getOperand(4).isImmediate() &&
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MI->getOperand(2).getImmedValue() == 1 &&
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MI->getOperand(3).getReg() == 0 &&
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MI->getOperand(4).getImmedValue() == 0) {
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FrameIndex = MI->getOperand(1).getFrameIndex();
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return MI->getOperand(0).getReg();
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}
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break;
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}
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return 0;
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}
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static MachineInstr *MakeMInst(unsigned Opcode, unsigned FrameIndex,
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MachineInstr *MI) {
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return addFrameReference(BuildMI(Opcode, 4), FrameIndex);
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@ -39,6 +39,9 @@ struct X86RegisterInfo : public X86GenRegisterInfo {
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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/// foldMemoryOperand - If this target supports it, fold a load or store of
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/// the specified stack slot into the specified machine instruction for the
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/// specified operand. If this is possible, the target should perform the
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